Datasheet LTC3401 (Analog Devices) - 8

LTC3401
U U W U APPLICATIO S I FOR ATIO DETAILED DESCRIPTION Current Sensing
. Lossless current sensing converts the peak current signal to a voltage to sum in with the internal The LTC3401 provides high efficiency, low noise power slope compensation. This summed signal is compared to for applications such as portable instrumentation. The the error amplifier output to provide a peak current control current mode architecture with adaptive slope compensa- command for the PWM. The slope compensation in the IC tion provides ease of loop compensation with excellent is adaptive to the input and output voltage. Therefore, the transient load response. The low RDS(ON), low gate charge converter provides the proper amount of slope compensa- synchronous switches provide the pulse width modula- tion to ensure stability and not an excess causing a loss of tion control at high efficiency. phase margin in the converter. The Schottky diode across the synchronous PMOS switch
Error Amp
. The error amplifier is a transconductance provides a lower drop during the break-before-make time amplifier with gm = 0.1ms. A simple compensation net- (typically 20ns) of the NMOS to PMOS transition. The work is placed from the VC pin to ground. Schottky diode improves efficiency (see graph “Efficiency loss without Schottky vs Frequency”). While the IC’s
Current Limit
. The current limit amplifier will shut the quiescent current is a low 38μA, high efficiency is achieved NMOS switch off once the current exceeds its threshold. at light loads when Burst Mode operation is entered. The current amplifier delay to output is typically 50ns.
Zero Current Amp
. The zero current amplifier monitors the
Low Voltage Start-Up
inductor current to the output and shuts off the synchro- The LTC3401 is designed to start up at input voltages of nous rectifier once the current is below 50mA, preventing typically 0.85V. The device can start up under some load, negative inductor current. (see graph “Start-Up vs Input Voltage”). Once the output
Antiringing Control
. The anitringing control will place an voltage exceeds a threshold of 2.3V, the IC powers itself impedance across the inductor to damp the ringing on the from VOUT instead of VIN. At this point, the internal circuitry SW pin during discontinuous mode operation. The LCSW has no dependency on the VIN input voltage, eliminating ringing (L = inductor, CSW = capacitance on the switch pin) the requirement for a large input capacitor. The input is low energy, but can cause EMI radiation. voltage can drop below 0.5V without affecting the opera- tion, but the limiting factor for the application becomes the
Burst Mode Operation
availability of the power source to supply sufficient energy to the output at the low voltages. Burst Mode operation is when the IC delivers energy to the output until it is regulated and then goes into a sleep mode
Low Noise Fixed Frequency Operation
where the outputs are off and the IC is consuming only 38μA. In this mode, the output ripple has a variable
Oscillator
. The frequency of operation is set through a frequency component with load current and the steady resistor from the Rt pin to ground: state ripple will be typically below 3%. f = 3 • 1010/Rt During the period where the device is delivering energy to An internally trimmed timing capacitor resides inside the the output, the peak current will be equal to 1/3 the current IC. The oscillator can be synchronized with an external limit value and the inductor current will terminate at zero clock inserted on the MODE/SYNC pin. When synchroniz- current for each cycle. In this mode the maximum output ing the oscillator, the free running frequency must be set current is given by: to approximately 30% lower than the desired synchro- V nized frequency. Keeping the sync pulse width below 2μs I IN ≈ Amps OUT MAXBURST ( ) will ensure that Burst Mode operation is disabled. 6 • VOUT 3401fb 8