Datasheet LTC3423, LTC3424 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | Low Output Voltage, 3MHz Micropower Synchronous Boost Converters |
| 页数 / 页 | 12 / 5 — TYPICAL PERFOR A CE CHARACTERISTICS. Shutdown Threshold. Burst Mode … |
| 文件格式/大小 | PDF / 211 Kb |
| 文件语言 | 英语 |
TYPICAL PERFOR A CE CHARACTERISTICS. Shutdown Threshold. Burst Mode Operation Current. PI FU CTIO S. Rt (Pin 1):. SW (Pin 4):
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文件文字版本
LTC3423/LTC3424
W U TYPICAL PERFOR A CE CHARACTERISTICS Shutdown Threshold Burst Mode Operation Current
1.10 44 1.05 42 1.00 0.95 40 0.90 µA) 38 0.85 36 VOLTAGE (V) 0.80 CURRENT ( 0.75 34 0.70 32 0.65 0.60 30 –55 –15 25 65 105 125 –55 –15 25 65 105 125 TEMPERATURE (°C) TEMPERATURE (°C) 3423/24 G13 3423/24 G14
U U U PI FU CTIO S Rt (Pin 1):
Timing Resistor to Program the Oscillator
SW (Pin 4):
Switch Pin. Connect inductor and optional Frequency. Schottky diode here. Minimize trace length to keep EMI down. f = 3 1010 • Hz OSC
GND (Pin 5):
Signal and Power Ground for the IC. Rt
VDD (Pin 6):
Power Source for the IC. Typically derived
MODE/SYNC (Pin 2):
Burst Mode Select and Oscillator from a higher voltage power converter. Requires an input Synchronization. of 2.7V to 5.5V. A 2.2µF ceramic bypass capacitor is MODE/SYNC = High. Enable Burst Mode operation. The recommended as close to the pins as possible. inductor peak inductor current will be 400mA and
VOUT (Pin 7):
Output of the Synchronous Rectifier. return to zero current on each cycle. During Burst Mode operation the operation is variable frequency, providing
FB (Pin 8):
Feedback Pin. Connect resistor divider tap a significant efficiency improvement at light loads. It is here. The output voltage can be adjusted from 1.5V to recommended the Burst Mode operation only be en- 5.5V. The feedback reference voltage is typically 1.25V. tered once the part has started up.
VC (Pin 9):
Error Amp Output. A frequency compensation MODE/SYNC = Low. Disable Burst Mode operation and network is connected to this pin to compensate the loop. maintain low noise, constant frequency operation. See the section “Compensating the Feedback Loop” for guidelines. MODE/SYNC = External CLK. Synchronization of the internal oscillator and Burst Mode operation disable. A
SHDN (Pin 10):
Shutdown. Grounding this pin shuts down clock pulse width of 100ns to 2µs is required to the IC. Tie to >1V to enable (VDD or digital gate output). synchronize. During shutdown the output voltage will hold up to VIN minus a diode drop due to the body diode of the PMOS
VIN (Pin 3):
Voltage Sense for Internal Circuitry. synchronous switch. If the application requires a com- plete disconnect during shutdown then refer to section “Output Disconnect”. 34234f 5
W U TYPICAL PERFOR A CE CHARACTERISTICS Shutdown Threshold Burst Mode Operation Current
1.10 44 1.05 42 1.00 0.95 40 0.90 µA) 38 0.85 36 VOLTAGE (V) 0.80 CURRENT ( 0.75 34 0.70 32 0.65 0.60 30 –55 –15 25 65 105 125 –55 –15 25 65 105 125 TEMPERATURE (°C) TEMPERATURE (°C) 3423/24 G13 3423/24 G14
U U U PI FU CTIO S Rt (Pin 1):
Timing Resistor to Program the Oscillator
SW (Pin 4):
Switch Pin. Connect inductor and optional Frequency. Schottky diode here. Minimize trace length to keep EMI down. f = 3 1010 • Hz OSC
GND (Pin 5):
Signal and Power Ground for the IC. Rt
VDD (Pin 6):
Power Source for the IC. Typically derived
MODE/SYNC (Pin 2):
Burst Mode Select and Oscillator from a higher voltage power converter. Requires an input Synchronization. of 2.7V to 5.5V. A 2.2µF ceramic bypass capacitor is MODE/SYNC = High. Enable Burst Mode operation. The recommended as close to the pins as possible. inductor peak inductor current will be 400mA and
VOUT (Pin 7):
Output of the Synchronous Rectifier. return to zero current on each cycle. During Burst Mode operation the operation is variable frequency, providing
FB (Pin 8):
Feedback Pin. Connect resistor divider tap a significant efficiency improvement at light loads. It is here. The output voltage can be adjusted from 1.5V to recommended the Burst Mode operation only be en- 5.5V. The feedback reference voltage is typically 1.25V. tered once the part has started up.
VC (Pin 9):
Error Amp Output. A frequency compensation MODE/SYNC = Low. Disable Burst Mode operation and network is connected to this pin to compensate the loop. maintain low noise, constant frequency operation. See the section “Compensating the Feedback Loop” for guidelines. MODE/SYNC = External CLK. Synchronization of the internal oscillator and Burst Mode operation disable. A
SHDN (Pin 10):
Shutdown. Grounding this pin shuts down clock pulse width of 100ns to 2µs is required to the IC. Tie to >1V to enable (VDD or digital gate output). synchronize. During shutdown the output voltage will hold up to VIN minus a diode drop due to the body diode of the PMOS
VIN (Pin 3):
Voltage Sense for Internal Circuitry. synchronous switch. If the application requires a com- plete disconnect during shutdown then refer to section “Output Disconnect”. 34234f 5