LTC3527/LTC3527-1 ELECTRICAL CHARACTERISTICSThe l denotes the specifi cations which apply over the full operatingtemperature range, –40°C to 85°C. VIN = VIN1 = VIN2 = 1.2V, VOUT1 = VOUT2 = 3.3V, TA = 25°C, unless otherwise noted.PARAMETERCONDITIONSMINTYPMAXUNITS PMOS Switch Leakage Current (LTC3527) VSW1,2 = 5V, VOUT1,2 = 0V, SHDN1,2 = 0V 0.1 10 μA NMOS and PMOS Combined Switch Leakage Current VSW1,2 = 5V, VOUT1,2 = 0V, SHDN1,2 = 0V (Note 6) 0.2 20 μA (LTC3527-1) NMOS Switch On-Resistance, SW1 0.30 Ω NMOS Switch On-Resistance, SW2 0.50 Ω PMOS Switch On-Resistance, SW1 0.40 Ω PMOS Switch On-Resistance, SW2 0.60 Ω NMOS Current Limit, SW1 l 800 mA NMOS Current Limit, SW2 l 400 mA Current Limit Delay to Output Time (Note 4) 60 ns Maximum Duty Cycle VFB1,2 = 1V l 85 90 % Minimum Duty Cycle VFB1,2 = 1.3V l 0 % Switching Frequency VFSEL = 0V l 0.9 1.2 1.5 MHz Switching Frequency VFSEL = 3.3V l 1.8 2.2 2.8 MHz SHDN1,2 Input High Voltage 0.88 V SHDN1,2 Input Low Voltage 0.35 V SHDN1,2 Input Current VSHDN1,2 = 3.3V 1 2 μA PGOOD1, PGOOD2 Threshold Referenced to the Feedback Voltage –6 –9 –14 % PGOOD1, PGOOD2 Low Voltage IPGOOD1,2 = 1mA 0.1 0.2 V PGOOD1, PGOOD2 Leakage Current VPGOOD1,2 = 5.25V 0.01 1 μA MODE Input High Voltage 1 V MODE Input Low Voltage 0.35 V MODE Input Current VMODE = 3.3V 1 2 μA FSEL Input High Voltage 0.88 V FSEL Input Low Voltage 0.35 V FSEL Input Current VFSEL = 3.3V 1 2 μA Soft-Start Time 0.5 ms Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 4: Specifi cation is guaranteed by design and not 100% tested in may cause permanent damage to the device. Exposure to any Absolute production. Maximum Rating condition for extended periods may affect device Note 5: The LTC3527/LTC3527-1 includes an overtemperature shutdown reliability and lifetime. that is intended to protect the device during momentary overload Note 2: The LTC3527E/LTC3527E-1 are guaranteed to meet performance conditions. Junction temperature will exceed 125°C when the over- specifi cations from 0°C to 85°C. Specifi cations over the –40°C to 85°C temperature shutdown is active. Continuous operation above the specifi ed operating temperature range are assured by design, characterization and maximum junction temperature may impair device reliability. correlation with statistical process controls. Note 6: The NMOS and PMOS switch leakage currents are tested in parallel Note 3: Current is measured into the VOUT pin since the supply current is for the LTC3527-1 because VOUT1,2 are actively pulled to ground when bootstrapped to the output. The current will refl ect to the input supply by: SHDN1,2 = 0V (VOUT/VIN) • (1/Effi ciency). All switches are off. 35271fc 3