Datasheet LTC3528, LTC3528B (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | 1A, 1MHz Synchronous Step-Up DC/DC Converters in 3mm x 2mm DFN |
| 页数 / 页 | 18 / 7 — PIN FUNCTIONS. SGND (Pin 7):. GND (Exposed Pad Pin 9):. The exposed pad … |
| 文件格式/大小 | PDF / 340 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS. SGND (Pin 7):. GND (Exposed Pad Pin 9):. The exposed pad must be. soldered to the PCB ground plane. IN (Pin 8):
该数据表的模型线
文件文字版本
LTC3528/LTC3528B
PIN FUNCTIONS SGND (Pin 7):
Signal Ground. Provide a short direct PCB
GND (Exposed Pad Pin 9): The exposed pad must be
path between SGND and the (–) side of the input and
soldered to the PCB ground plane.
It serves as another output capacitors. ground connection and as a means of conducting heat
V
away from the die.
IN (Pin 8):
Battery Input Voltage. Connect a minimum of 1µF ceramic decoupling capacitor from this pin to ground.
BLOCK DIAGRAM
L1 4.7µH VIN 0.7V TO 5V CIN 8 5 4.7µF VIN SW ANTI-RING VOUT VSEL WELL V SWITCH BEST VB V V OUT OUT 4 1.6V TO 5.25V GATE DRIVERS AND R2 ANTI-CROSS SHDN FB C 1 SHUTDOWN SHUTDOWN CONDUCTION – + 2 OUT I 10µF ZERO 4M Σ COMP R1 PK SLOPE V COMP REF VREF – COMP UVLO PK UVLO + ERROR AMP IZERO SLEEP COMP START-UP + VREF LOGIC MODE CONTROL – 1MHz CLK (LTC3528) FB OSC PGOOD BURST 3 CLAMP + VREF – 10% – FB SOFT-START THERMAL TSD WAKE SHUTDOWN EXPOSED PGND SGND PAD 6 7 9 3528 BD 3528fd 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration order information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts
PIN FUNCTIONS SGND (Pin 7):
Signal Ground. Provide a short direct PCB
GND (Exposed Pad Pin 9): The exposed pad must be
path between SGND and the (–) side of the input and
soldered to the PCB ground plane.
It serves as another output capacitors. ground connection and as a means of conducting heat
V
away from the die.
IN (Pin 8):
Battery Input Voltage. Connect a minimum of 1µF ceramic decoupling capacitor from this pin to ground.
BLOCK DIAGRAM
L1 4.7µH VIN 0.7V TO 5V CIN 8 5 4.7µF VIN SW ANTI-RING VOUT VSEL WELL V SWITCH BEST VB V V OUT OUT 4 1.6V TO 5.25V GATE DRIVERS AND R2 ANTI-CROSS SHDN FB C 1 SHUTDOWN SHUTDOWN CONDUCTION – + 2 OUT I 10µF ZERO 4M Σ COMP R1 PK SLOPE V COMP REF VREF – COMP UVLO PK UVLO + ERROR AMP IZERO SLEEP COMP START-UP + VREF LOGIC MODE CONTROL – 1MHz CLK (LTC3528) FB OSC PGOOD BURST 3 CLAMP + VREF – 10% – FB SOFT-START THERMAL TSD WAKE SHUTDOWN EXPOSED PGND SGND PAD 6 7 9 3528 BD 3528fd 7 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration order information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts