Datasheet LTC3539, LTC3539-2 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 2A, 1MHz/2MHz Synchronous Step-Up DC/DC Converters |
| 页数 / 页 | 14 / 6 — PIN FUNCTIONS. SW (Pin 1):. MODE (Pin 7):. PGND (Pin 2), GND (Pin 3):. … |
| 文件格式/大小 | PDF / 194 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS. SW (Pin 1):. MODE (Pin 7):. PGND (Pin 2), GND (Pin 3):. VIN (Pin 4):. VOUT (Pin 8):. SHDN (Pin 5):
该数据表的模型线
文件文字版本
LTC3539/LTC3539-2
PIN FUNCTIONS SW (Pin 1):
Switch Pin. Connect inductor between SW Connect resistor divider tap to this pin. The output volt- and VIN. Keep PCB trace lengths as short and wide as pos- age can be adjusted from 1.5V to 5.25V by: VOUT = 1.20V sible to reduce EMI. If the inductor current falls to zero, • [1 + (R2/R1)] or SHDN is low, an internal anti-ring resistor is connected
MODE (Pin 7):
Burst Mode Pin. A logic controlled input from SW to VIN to minimize EMI. to select either automatic Burst Mode operation or forced
PGND (Pin 2), GND (Pin 3):
Signal and Power Ground. fixed frequency operation. Provide a short direct PCB path between PGND, GND and MODE = High: Burst Mode operation at light loads the (–) side of the input and output capacitors. MODE = Low: Fixed frequency PWM Mode
VIN (Pin 4):
Battery Input Voltage. Connect a minimum of 2.2µF ceramic decoupling capacitor from this pin to ground.
VOUT (Pin 8):
Output Voltage Sense and Drain of the Internal Synchronous Rectifier. PCB trace length from
SHDN (Pin 5):
Logic Controlled Shutdown Input. There V is an internal 4MΩ pull-down on this pin. OUT to the output filter capacitor should be as short and wide as possible. SHDN = High: Normal operation.
Exposed Pad (Pin 9):
The exposed pad must be soldered SHDN = Low: Shutdown, quiescent current <1µA. to the PCB ground plane. It serves as another ground
FB (Pin 6):
Feedback Input to the g connection, and as a means of conducting heat away m Error Amplifier. from the die.
BLOCK DIAGRAM
VIN 1 4 V SW VIN OUT VSEL V WELL BEST VB SWITCH 8 VOUT VOUT R2 GATE DRIVERS AND – + ANTI-CROSS 6 CONDUCTION I OFF ON 5 SHUTDOWN SHUTDOWN ZERO FB COMPARATOR SHDN R1 IPK COMPARATOR Σ – V SLOPE + REF VREF V COMPARATOR REF UVLO IPK UVLO + – FB START-UP IZERO ERROR LOGIC AND AMPLIFIER/SLEEP BURST MODE 1MHz/2MHz CLK COMPARATOR CONTROL OSC BURST PWM BURST 7 CLAMP MODE THERMAL TSD WAKE SHUTDOWN SOFT-START EXPOSED PAD PGND GND 9 2 3 3539 BD 35392fc 6 For more information www.linear.com/3539/3539-2 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts
PIN FUNCTIONS SW (Pin 1):
Switch Pin. Connect inductor between SW Connect resistor divider tap to this pin. The output volt- and VIN. Keep PCB trace lengths as short and wide as pos- age can be adjusted from 1.5V to 5.25V by: VOUT = 1.20V sible to reduce EMI. If the inductor current falls to zero, • [1 + (R2/R1)] or SHDN is low, an internal anti-ring resistor is connected
MODE (Pin 7):
Burst Mode Pin. A logic controlled input from SW to VIN to minimize EMI. to select either automatic Burst Mode operation or forced
PGND (Pin 2), GND (Pin 3):
Signal and Power Ground. fixed frequency operation. Provide a short direct PCB path between PGND, GND and MODE = High: Burst Mode operation at light loads the (–) side of the input and output capacitors. MODE = Low: Fixed frequency PWM Mode
VIN (Pin 4):
Battery Input Voltage. Connect a minimum of 2.2µF ceramic decoupling capacitor from this pin to ground.
VOUT (Pin 8):
Output Voltage Sense and Drain of the Internal Synchronous Rectifier. PCB trace length from
SHDN (Pin 5):
Logic Controlled Shutdown Input. There V is an internal 4MΩ pull-down on this pin. OUT to the output filter capacitor should be as short and wide as possible. SHDN = High: Normal operation.
Exposed Pad (Pin 9):
The exposed pad must be soldered SHDN = Low: Shutdown, quiescent current <1µA. to the PCB ground plane. It serves as another ground
FB (Pin 6):
Feedback Input to the g connection, and as a means of conducting heat away m Error Amplifier. from the die.
BLOCK DIAGRAM
VIN 1 4 V SW VIN OUT VSEL V WELL BEST VB SWITCH 8 VOUT VOUT R2 GATE DRIVERS AND – + ANTI-CROSS 6 CONDUCTION I OFF ON 5 SHUTDOWN SHUTDOWN ZERO FB COMPARATOR SHDN R1 IPK COMPARATOR Σ – V SLOPE + REF VREF V COMPARATOR REF UVLO IPK UVLO + – FB START-UP IZERO ERROR LOGIC AND AMPLIFIER/SLEEP BURST MODE 1MHz/2MHz CLK COMPARATOR CONTROL OSC BURST PWM BURST 7 CLAMP MODE THERMAL TSD WAKE SHUTDOWN SOFT-START EXPOSED PAD PGND GND 9 2 3 3539 BD 35392fc 6 For more information www.linear.com/3539/3539-2 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts