Datasheet LTC3729L-6 (Analog Devices) - 8

LTC3729L-6
U U U PI FU CTIO S SGND (Pin 6):
Signal Ground, common to both control-
BG2, BG1 (Pins 18, 22):
High Current Gate Drives for lers, must be routed separately from the input switched Bottom Synchronous N-Channel MOSFETS. Voltage swing current ground path to the common (–) terminal(s) of the at these pins is from ground to INTVCC. COUT capacitor(s).
PGND (Pin 19):
Driver Power Ground. Connect to sources
VDIFFOUT (Pin 7):
Output of a Differential Amplifier that of bottom N-channel MOSFETS and the (–) terminals of provides true remote output voltage sensing. This pin CIN. normally drives an external resistive divider that sets the
INTV
output voltage.
CC (Pin 20):
Output of the Internal 5V Linear Low Dropout Regulator and the EXTVCC Switch. The driver and
V – + OS , VOS (Pins 8, 9):
Inputs to an Operational Amplifier. control circuits are powered from this voltage source. Internal precision resistors capable of being electronically Decouple to power ground with a 1µF ceramic capacitor switched in or out can configure it as a differential ampli- placed directly adjacent to the IC and minimum of 4.7µF fier or an uncommitted op amp. additional tantalum or other low ESR capacitor.
NC (Pins 10, 16, 29, 32):
Not Connected.
EXTVCC (Pin 21):
External Power Input to an Internal
SENSE2–, SENSE1– (Pins 11, 31):
The (–) Input to the Switch . This switch closes and supplies INTVCC, bypass- Differential Current Comparators. ing the internal low dropout regulator whenever EXTVCC is higher than 4.7V. See EXTVCC Connection in the Applica-
SENSE2+, SENSE1+ (Pins 12, 30):
The (+) Input to the tions Information section. Do not exceed 7V on this pin Differential Current Comparators. The ITH pin voltage and and ensure VEXTVCC ≤ VINTVCC. built-in offsets between SENSE– and SENSE+ pins in conjunction with R
VIN (Pin 23):
Main Supply Pin. Should be closely decoupled SENSE set the current trip threshold. to the IC’s signal ground pin.
PGOOD (Pin 13):
Open-Drain Logic Output. PGOOD is pulled to ground when the voltage on the EAIN pin is not
CLKOUT (Pin 27):
Output Clock Signal available to within ±10% of its set point. An internal timer masks the daisychain other controller ICs for additional MOSFET PGOOD from going low for 100µs in OV and UV conditions. driver stages/phases.
TG2, TG1 (Pins 14, 26):
High Current Gate Drives for Top
RUN/SS (Pin 28):
Combination of Soft-Start, Run Control N-Channel MOSFETS. These are the outputs of floating Input and Short-Circuit Detection Timer. A capacitor to drivers with a voltage swing equal to INTV ground at this pin sets the ramp time to full current output. CC superim- posed on the switch node voltage SW. Forcing this pin below 0.8V causes the IC to shut down all internal circuitry. All functions are disabled in shutdown.
SW2, SW1 (Pins 15, 25):
Switch Node Connections to Inductors. Voltage swing at these pins is from a Schottky diode (external) voltage drop below ground to VIN.
BOOST2, BOOST1 (Pins 17, 24):
Bootstrapped Supplies to the Topside Floating Drivers. Capacitors are connected between the Boost and Switch pins and Schottky diodes are tied between the Boost and INTVCC pins. Voltage swing at the Boost pins is from INTVCC to (VIN + INTVCC). sn3729l6 3729l6fs 8