Datasheet LTC3770 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | Fast No RSENSE Step-Down Synchronous Controller with Margining, Tracking and PLL |
| 页数 / 页 | 24 / 9 — PIN FUNCTIONS (UH Package/G Package). VON (Pin 31/Pin 2):. Exposed Pad … |
| 文件格式/大小 | PDF / 273 Kb |
| 文件语言 | 英语 |
PIN FUNCTIONS (UH Package/G Package). VON (Pin 31/Pin 2):. Exposed Pad (Pin 33) UH Package:. PGOOD (Pin 32/Pin 3):
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文件文字版本
LTC3770
PIN FUNCTIONS (UH Package/G Package) VON (Pin 31/Pin 2):
On-Time Voltage Input. Connecting this logic output that is pulled to ground when the output volt- pin to the output voltage makes the on-time proportional age is not within ±10% of the regulation point, after the to VOUT. The comparator input defaults to 0.6V when the internal 25μs power bad mask timer expires. pin is grounded and defaults to 4.8V when the pin is tied
Exposed Pad (Pin 33) UH Package:
Signal Ground. Must to INTVCC. be soldered to the PCB ground for electrical contact and
PGOOD (Pin 32/Pin 3):
Power Good Output. Open drain optimum thermal performance.
FUNCTIONAL DIAGRAM (UH Package)
R V ON OUT PLLFLTR VIN INTV 12 31 VON 7 I CC ON 29 FCB 14 VIN 0.6V 4.8V + 1μA CIN 5V R REG 15 V Z INSNS VIN R 0.6V 16 Z0 28 INTV PLL-SYNC CC R – + Z1 17 19 F Z2 18 BOOST 27 V PLLIN 13 VON tON = (10pF) R IION TG CB S Q FCNT 26 M1 SW ON SWITCH 20k 25 R4 + + LOGIC AND SENSE+ D L1 B I ANTI- CMP IREV 24 V MPGM OUT 10 1.18V SHOOT – – THROUGH SENSE– 23 – + RUN DRVCC + 2.0V 20 COUT BG OV VRNG 21 M2 1 FOLDBACK MARGIN0 CVCC R DISABLED SENSE (0.5~2) (OPTIONAL)* 6 AT START-UP* PGND 0.5V MARGIN1 + 0.25V 22 5 3.3μA 32 –FOLDBACK PGOOD + VIN 1 0.6V 240k R2 REF – – Q2 Q4 OV V I 10K FB THB Q6 + 2 R1 SGND Q1 – 4 10K UV SW + SENSE+ – + SS RUN INTVCC 90K BG M2 – + – + SENSE– EA 1.4μA + + – PGND 80% • VREFIN 1.5V *CONNECTION W/O SENSE RESISTOR 12K V V REFOUT REFIN C C 9 8 3 I C1 SS TH R RUN 30 11 TRACK/SS C R3 3770fc 9
PIN FUNCTIONS (UH Package/G Package) VON (Pin 31/Pin 2):
On-Time Voltage Input. Connecting this logic output that is pulled to ground when the output volt- pin to the output voltage makes the on-time proportional age is not within ±10% of the regulation point, after the to VOUT. The comparator input defaults to 0.6V when the internal 25μs power bad mask timer expires. pin is grounded and defaults to 4.8V when the pin is tied
Exposed Pad (Pin 33) UH Package:
Signal Ground. Must to INTVCC. be soldered to the PCB ground for electrical contact and
PGOOD (Pin 32/Pin 3):
Power Good Output. Open drain optimum thermal performance.
FUNCTIONAL DIAGRAM (UH Package)
R V ON OUT PLLFLTR VIN INTV 12 31 VON 7 I CC ON 29 FCB 14 VIN 0.6V 4.8V + 1μA CIN 5V R REG 15 V Z INSNS VIN R 0.6V 16 Z0 28 INTV PLL-SYNC CC R – + Z1 17 19 F Z2 18 BOOST 27 V PLLIN 13 VON tON = (10pF) R IION TG CB S Q FCNT 26 M1 SW ON SWITCH 20k 25 R4 + + LOGIC AND SENSE+ D L1 B I ANTI- CMP IREV 24 V MPGM OUT 10 1.18V SHOOT – – THROUGH SENSE– 23 – + RUN DRVCC + 2.0V 20 COUT BG OV VRNG 21 M2 1 FOLDBACK MARGIN0 CVCC R DISABLED SENSE (0.5~2) (OPTIONAL)* 6 AT START-UP* PGND 0.5V MARGIN1 + 0.25V 22 5 3.3μA 32 –FOLDBACK PGOOD + VIN 1 0.6V 240k R2 REF – – Q2 Q4 OV V I 10K FB THB Q6 + 2 R1 SGND Q1 – 4 10K UV SW + SENSE+ – + SS RUN INTVCC 90K BG M2 – + – + SENSE– EA 1.4μA + + – PGND 80% • VREFIN 1.5V *CONNECTION W/O SENSE RESISTOR 12K V V REFOUT REFIN C C 9 8 3 I C1 SS TH R RUN 30 11 TRACK/SS C R3 3770fc 9