Datasheet LTC3775 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | High Frequency Synchronous Step-Down Voltage Mode DC/DC Controller |
| 页数 / 页 | 34 / 4 — ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply … |
| 文件格式/大小 | PDF / 553 Kb |
| 文件语言 | 英语 |
ELECTRICAL CHARACTERISTICS. The. denotes the specifi cations which apply over the full operating
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LTC3775
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are at TA = 25°C (Note 2). VIN = 12V, VRUN = 5V, unless otherwise specifi ed. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Oscillator
fOSC Oscillator Frequency RSET = 39.2k l 425 500 575 kHz fHIGH Maximum Oscillator Frequency l 1000 kHz fLOW Minimum Oscillator Frequency l 250 kHz fSYNC External Sync Frequency Range With Reference to Free Running –20 20 % tON(MIN) TG Minimum On-Time (Notes 6, 8) VMODE/SYNC = 0V 30 ns tOFF(MIN) TG Minimum Off-Time (Note 6) 300 ns DCMAX Maximum TG Duty Cycle fOSC = 500kHz l 90 % VMODE MODE/SYNC Threshold MODE/SYNC Rising 1.2 V VMODE(HYST) MODE/SYNC Hysteresis 430 mV RMODE/SYNC MODE/SYNC Input Resistance to SGND 50 kΩ
Driver
BG RUP Bottom Gate (BG) Pull-Up On-Resistance 2.5 Ω TG RUP Top Gate (TG) Pull-Up On-Resistance 2.5 Ω BG RDOWN Bottom Gate (BG) Pull-Down On-Resistance 1.0 Ω TG RDOWN Top Gate (TG) Pull-Down On-Resistance 1.5 Ω BG, TG t2D Bottom Gate Off to Top Gate On Delay CL = 3300pF (Note 7) 15 ns Top Switch-On Delay Time TG, BG t1D Top Gate Off to Bottom Gate On Delay CL = 3300pF (Note 7) 15 ns Synchronous Switch-On Delay Time
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 3:
Failure to solder the exposed pad of the UD package to the PC may cause permanent damage to the device. Exposure to any Absolute board will result in a thermal resistance much higher than 68°C/W. Maximum Rating condition for extended periods may affect device
Note 4:
All currents into device pins are positive; all currents out of device reliability and lifetime. pins are negative. All voltages are referenced to ground unless otherwise
Note 2:
The LTC3775 is tested under pulsed load conditions such that TJ ≈ TA. specifi ed. The LTC3775E is guaranteed to meet specifi cations from 0°C to 85°C
Note 5:
Supply current in normal operation is dominated by the current junction temperature. Specifi cations over the –40°C to 125°C operating needed to charge and discharge the external MOSFET gates. This current junction temperature range are assured by design, characterization and will vary with supply voltage and the external MOSFETs used. correlation with statistical process controls. The LTC3775I is guaranteed
Note 6:
Guaranteed by design, not subject to test. over the –40°C to 125°C operating junction temperature range. Note that
Note 7:
Rise and fall times are measured using 10% and 90% levels. Delay the maximum ambient temperature consistent with these specifi cations and nonoverlap times are measured using 50% levels. is determined by specifi c operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental
Note 8:
The LTC3775 leading edge modulation architecture does not have factors. a minimum TG pulse width requirement. The TG minimum pulse width is limited by the SW node rise and fall times. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal impedance. 3775fa 4 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS
ELECTRICAL CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are at TA = 25°C (Note 2). VIN = 12V, VRUN = 5V, unless otherwise specifi ed. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Oscillator
fOSC Oscillator Frequency RSET = 39.2k l 425 500 575 kHz fHIGH Maximum Oscillator Frequency l 1000 kHz fLOW Minimum Oscillator Frequency l 250 kHz fSYNC External Sync Frequency Range With Reference to Free Running –20 20 % tON(MIN) TG Minimum On-Time (Notes 6, 8) VMODE/SYNC = 0V 30 ns tOFF(MIN) TG Minimum Off-Time (Note 6) 300 ns DCMAX Maximum TG Duty Cycle fOSC = 500kHz l 90 % VMODE MODE/SYNC Threshold MODE/SYNC Rising 1.2 V VMODE(HYST) MODE/SYNC Hysteresis 430 mV RMODE/SYNC MODE/SYNC Input Resistance to SGND 50 kΩ
Driver
BG RUP Bottom Gate (BG) Pull-Up On-Resistance 2.5 Ω TG RUP Top Gate (TG) Pull-Up On-Resistance 2.5 Ω BG RDOWN Bottom Gate (BG) Pull-Down On-Resistance 1.0 Ω TG RDOWN Top Gate (TG) Pull-Down On-Resistance 1.5 Ω BG, TG t2D Bottom Gate Off to Top Gate On Delay CL = 3300pF (Note 7) 15 ns Top Switch-On Delay Time TG, BG t1D Top Gate Off to Bottom Gate On Delay CL = 3300pF (Note 7) 15 ns Synchronous Switch-On Delay Time
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 3:
Failure to solder the exposed pad of the UD package to the PC may cause permanent damage to the device. Exposure to any Absolute board will result in a thermal resistance much higher than 68°C/W. Maximum Rating condition for extended periods may affect device
Note 4:
All currents into device pins are positive; all currents out of device reliability and lifetime. pins are negative. All voltages are referenced to ground unless otherwise
Note 2:
The LTC3775 is tested under pulsed load conditions such that TJ ≈ TA. specifi ed. The LTC3775E is guaranteed to meet specifi cations from 0°C to 85°C
Note 5:
Supply current in normal operation is dominated by the current junction temperature. Specifi cations over the –40°C to 125°C operating needed to charge and discharge the external MOSFET gates. This current junction temperature range are assured by design, characterization and will vary with supply voltage and the external MOSFETs used. correlation with statistical process controls. The LTC3775I is guaranteed
Note 6:
Guaranteed by design, not subject to test. over the –40°C to 125°C operating junction temperature range. Note that
Note 7:
Rise and fall times are measured using 10% and 90% levels. Delay the maximum ambient temperature consistent with these specifi cations and nonoverlap times are measured using 50% levels. is determined by specifi c operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental
Note 8:
The LTC3775 leading edge modulation architecture does not have factors. a minimum TG pulse width requirement. The TG minimum pulse width is limited by the SW node rise and fall times. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal impedance. 3775fa 4 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION REVISION HISTORY TYPICAL APPLICATION RELATED PARTS