Datasheet LTC3105 (Analog Devices) - 9
| 制造商 | Analog Devices |
| 描述 | 400mA Step-Up DC/DC Converter with Maximum Power Point Control and 250mV Start-Up |
| 页数 / 页 | 18 / 9 — OPERATION. Figure 1. Typical Converter Start-Up Sequence. Auxiliary LDO |
| 文件格式/大小 | PDF / 496 Kb |
| 文件语言 | 英语 |
OPERATION. Figure 1. Typical Converter Start-Up Sequence. Auxiliary LDO
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LTC3105
OPERATION
INDUCTOR CURRENT TIME TAGE OUTPUT VOL VAUX VLDO VOUT 1.4V TIME VOUT IN LDO IN REGULATION REGULATION VOUT = VAUX VOUT SYNCHRONOUS START-UP MODE NORMAL OPERATION RECTIFIER ENABLED 3105 F01
Figure 1. Typical Converter Start-Up Sequence
above VAUX, an internal switch is enabled to connect the When VOUT reaches the regulation point, the N- and P- two outputs together. channel MOSFETs connected to the SW pin are disabled If V and the converter enters sleep. IN is greater than the voltage on the driven output (VOUT or VAUX), or the driven output is less than 1.2V (typical), the synchronous rectifiers are disabled. With the synchro-
Auxiliary LDO
nous rectifiers disabled, the converter operates in critical The integrated LDO provides a regulated 6mA rail to conduction mode. In this mode, the N-channel MOSFET power microcontrollers and external sensors. When the between SW and GND is enabled and remains on until the input voltage is above the minimum of 225mV, the LDO is inductor current reaches the peak current limit. It is then powered from the AUX output allowing the LDO to attain disabled and the inductor current discharges completely regulation while the main output is still charging. The LDO before the cycle is repeated. has a 12mA current limit and an internal 1ms soft-start When the output voltage is greater than the input voltage to eliminate inrush currents. The LDO output voltage is and greater than 1.2V, the synchronous rectifier is enabled. set by the FBLDO pin. If a resistor divider is connected In this mode, the N-channel MOSFET between SW and to this pin, the ratio of the resistors determines the LDO GND is enabled until the inductor current reaches the peak output voltage. If the FBLDO pin is connected directly to current limit. Once current limit is reached, the N-channel GND, the LDO will use a 2MΩ internal divider network to MOSFET turns off and the P-channel MOSFET between SW program a 2.2V nominal output voltage. The LDO should and the driven output is enabled. This switch remains on be programmed for an output voltage less than the pro- until the inductor current drops below the valley current grammed VOUT. limit and the cycle is repeated. 3105fb For more information www.linear.com/LTC3105 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Related Parts
OPERATION
INDUCTOR CURRENT TIME TAGE OUTPUT VOL VAUX VLDO VOUT 1.4V TIME VOUT IN LDO IN REGULATION REGULATION VOUT = VAUX VOUT SYNCHRONOUS START-UP MODE NORMAL OPERATION RECTIFIER ENABLED 3105 F01
Figure 1. Typical Converter Start-Up Sequence
above VAUX, an internal switch is enabled to connect the When VOUT reaches the regulation point, the N- and P- two outputs together. channel MOSFETs connected to the SW pin are disabled If V and the converter enters sleep. IN is greater than the voltage on the driven output (VOUT or VAUX), or the driven output is less than 1.2V (typical), the synchronous rectifiers are disabled. With the synchro-
Auxiliary LDO
nous rectifiers disabled, the converter operates in critical The integrated LDO provides a regulated 6mA rail to conduction mode. In this mode, the N-channel MOSFET power microcontrollers and external sensors. When the between SW and GND is enabled and remains on until the input voltage is above the minimum of 225mV, the LDO is inductor current reaches the peak current limit. It is then powered from the AUX output allowing the LDO to attain disabled and the inductor current discharges completely regulation while the main output is still charging. The LDO before the cycle is repeated. has a 12mA current limit and an internal 1ms soft-start When the output voltage is greater than the input voltage to eliminate inrush currents. The LDO output voltage is and greater than 1.2V, the synchronous rectifier is enabled. set by the FBLDO pin. If a resistor divider is connected In this mode, the N-channel MOSFET between SW and to this pin, the ratio of the resistors determines the LDO GND is enabled until the inductor current reaches the peak output voltage. If the FBLDO pin is connected directly to current limit. Once current limit is reached, the N-channel GND, the LDO will use a 2MΩ internal divider network to MOSFET turns off and the P-channel MOSFET between SW program a 2.2V nominal output voltage. The LDO should and the driven output is enabled. This switch remains on be programmed for an output voltage less than the pro- until the inductor current drops below the valley current grammed VOUT. limit and the cycle is repeated. 3105fb For more information www.linear.com/LTC3105 9 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Related Parts