LT3590 PIN FUNCTIONS (SC70/DFN)SW (Pin 1/Pin 3): Switch Pin. Minimize trace area at this VREG (Pin 6/Pin 6): Internally Generated 3.3V Regulated pin to minimize EMI. Connect the inductor at this pin. Output Pin. Must be locally bypassed with a 0.1μF X5R capacitor. GND (Pins 2, 3, 4/Pin 2): Ground Pins. All ground pins should be tied directly to local ground plane. Proper LED (Pin 7/Pin 5): Connection point for the anode of the soldering of these pins to the PCB ground is required to highest LED and the sense resistor. achieve the rated thermal performance. VIN (Pin 8/Pin 4): Input Supply Pin. Must be locally by- CTRL (Pin 5/Pin 1): Dimming and Shutdown Pin. passed. Connect it below 100mV to disable the switcher. As the Exposed Pad (NA/Pin 7): Ground. The Exposed Pad pin voltage is ramped from 0V to 1.5V, the feedback volt- should be soldered to the PCB ground to achieve the age (VIN - VLED) ramps from 0mV to 200mV, controlling rated thermal performance. the LBD current. V − V I IN LED LED = R1 BLOCK DIAGRAM VIN 48V VIN R1 C1 6.8Ω 1μF – + – A = 6.25 LED REG + EAMP + – C2 VREG + 1μF C3 0.1μF VREF 1.25V START-UP L1 CONTROL SW 470μH – VOUT PWM R Q + S + ∑ ISNS – RAMP GENERATOR 850kHz OSCILLATOR CTRL GND CONTROL 3590 F01 Figure 1. Block Diagram 3590f 6