Datasheet LT3745 (Analog Devices) - 11

制造商Analog Devices
描述16-Channel 50mA LED Driver with Buck Controller
页数 / 页28 / 11 — pin FuncTions. EN/UVLO (Pin 1):. RT (Pin 31):. SS (Pin 32):. LED00 to …
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pin FuncTions. EN/UVLO (Pin 1):. RT (Pin 31):. SS (Pin 32):. LED00 to LED15 (Pins 2 to 9, 22 to 29):. FB (Pin 33):

pin FuncTions EN/UVLO (Pin 1): RT (Pin 31): SS (Pin 32): LED00 to LED15 (Pins 2 to 9, 22 to 29): FB (Pin 33):

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LT3745
pin FuncTions EN/UVLO (Pin 1):
Enable and Undervoltage Lockout
RT (Pin 31):
Timing Resistor Pin. Programs the switching (UVLO) Pin. The pin can accept a digital input signal to frequency from 200kHz to 1MHz. See Table 2 for the rec- enable or disable the chip. Tie to 0.35V or lower to shut ommended RT values for common switching frequencies. down the chip or tie to 1.34V or higher for normal op-
SS (Pin 32):
Soft-Start Pin. Placing a capacitor here pro- eration. This pin can also be connected to VIN through a grams soft-start timing to limit inductor inrush current resistor divider to program a power input UVLO threshold. during startup. The soft-start cycle will not begin until all If both the enable and UVLO functions are not used, tie the VCC, EN/UVLO, and (VIN - VCAP) voltages are higher this pin to VCC pin. than their respective UVLO thresholds.
LED00 to LED15 (Pins 2 to 9, 22 to 29):
LED Driver Output
FB (Pin 33):
Feedback Pin. The pin is regulated to the Pins. Connect the cathodes of LED strings to these pins. internal bang-gap reference 1.205V during startup and
GND (Pins 10, 12, 19, 21):
Ground Pin. precharging phases. Connect to a resistor divider from the buck converter output to program the maximum LED
SCKI (Pin 11):
Serial Interface TTL/CMOS Logic Clock bus voltage. See more details in the Applications Informa- Input Pin. tion section.
SDI (Pin 13):
Serial Interface TTL/CMOS Logic Data Input
ISN (Pin 34):
Negative Inductor Current Sense Pin. The Pin. pin is connected to one terminal of the external inductor
LDI (Pin 14):
Serial Interface TTL/CMOS Logic Latch Input current sensing resistor and the buck converter output Pin. An asynchronous input signal at this pin latches the supplying parallel LED channels. serial data in the shift registers into the proper registers
ISP (Pin 35):
Positive Inductor Current Sense Pin. The pin and the status information is ready to shift out with the is connected to the inductor and the other terminal of the coming clock pulses. See more details in the Operation external inductor current sensing resistor. section.
CAP (Pin 36):
VIN Referenced Regulator Supply Capacitor
V
Pin. The pin holds the negative terminal of an internal V
CC (Pin 15):
Logic and Control Supply Pin. The pin powers IN serial data interface and internal control circuitry. Must be referenced 6.8V linear regulator used to bias the gate driver locally bypassed with a capacitor to ground. circuitry. Must be locally bypassed with a capacitor to VIN.
PWMCK (Pin 16):
Grayscale PWM Dimming TTL/CMOS
GATE (Pin 37):
Gate Driver Pin. The pin drives an external Logic Clock Pin. Individual PWM dimming signal is gener- P-channel power MOSFET with a typical peak current of ated by counting this clock pulse from zero to the bits in 1A. Connect this pin to the gate of the power MOSFET with its 12-bit grayscale PWM register. a short and wide PCB trace to minimize trace inductance.
LDO (Pin 17):
Serial Interface TTL/CMOS Logic Latch
VIN (Pin 38):
Power Input Supply Pin. Must be locally Output Pin. bypassed with a capacitor to ground.
T SDO (Pin 18):
Serial Interface TTL/CMOS Logic Data
SET (Pin 39):
Temperature Threshold Setting Pin. A resistor to ground programs overtemperature threshold. Output Pin. See more details in the Applications Information section.
SCKO (Pin 20):
Serial Interface TTL/CMOS Logic Clock
I
Output Pin.
SET (Pin 40):
Nominal LED Current Setting Pin. A resistor to ground programs the nominal LED current for all the
SYNC (Pin 30):
Switching Frequency Synchronization Pin. channels. See more details in the Applications Informa- Synchronizes the internal oscillator frequency to an exter- tion section. nal clock applied to the SYNC pin. The SYNC pin is TTL/
Exposed Pad (Pin 41):
Ground Pin. Must be soldered to a CMOS logic compatible. Tie to ground or VCC if not used. continuous copper ground plane to reduce die temperature and to increase the power capability of the device. 3745f 11 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Package Description Typical Application Related Parts