Datasheet LT3761A (Analog Devices) - 4

LT3761A
elecTrical characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Logic Inputs/Outputs
EN/UVLO Threshold Voltage Falling l 1.18 1.220 1.26 V EN/UVLO Rising Hysteresis 20 mV EN/UVLO Input Low Voltage IVIN Drops Below 1µA 0.4 V EN/UVLO Pin Bias Current Low EN/UVLO = 1.15V l 1.6 2.3 2.7 µA EN/UVLO Pin Bias Current High EN/UVLO = 1.33V 10 100 nA OPENLED Output Low IOPENLED = 1mA 200 mV
PWM Pin Signal Generator
PWM Falling Threshold l 0.78 0.83 0.88 V PWM Threshold Hysteresis (VPWMHYS) IDIM/SS = 0µA 0.35 0.4 0.6 V PWM Pull-Up Current (IPWMUP) PWM = 0.7V, IDIM/SS = 0µA 6 7.5 9 µA PWM Pull-Down Current (IPWMDN) PWM = 1.5V, IDIM/SS = 0µA 68 88 110 µA PWM Fault Mode Pull-Down Current INTVCC = 3.8V 15 mA PWMOUT Duty Ratio for PWM Signal Generator (Note 5) IDIM/SS = –6.5µA 3.2 3.8 4.4 % IDIM/SS = 0µA 7.2 7.9 8.6 % IDIM/SS = 20µA 42 50 58 % IDIM/SS = 44µA 93 95 97 % PWMOUT Signal Generator Frequency PWM = 47nF to GND, IDIM/SS = 0µA 215 300 400 Hz
PWMOUT, Gate Pin Drivers
PWMOUT Driver Output Rise Time (tr) CL = 560pF 35 ns PWMOUT Driver Output Fall Time (tf) CL = 560pF 35 ns PWMOUT Output Low (VOL) PWM = 0V 0.05 V PWMOUT Output High (VOH) INTVCC – V 0.05 GATE Output Rise Time (tr) CL = 3300pF 25 ns GATE Output Fall Time (tf) CL = 3300pF 25 ns GATE Output Low (VOL) 0.1 V GATE Output High (VOH) INTVCC – V 0.05
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings LT3761AI is guaranteed over the full –40°C to 125°C operating junction may cause permanent damage to the device. Exposure to any Absolute temperature range. Operating lifetime is derated at junction temperatures Maximum Rating condition for extended periods may affect device greater than 125°C. reliability and lifetime.
Note 4:
The LT3761A includes overtemperature protection that is intended
Note 2:
Do not apply a positive or negative voltage or current source to to protect the device during momentary overload conditions. Junction GATE or PWMOUT pins, otherwise permanent damage may occur. temperature will exceed the maximum operating junction temperature
Note 3:
The LT3761AE is guaranteed to meet performance specifications when overtemperature protection is active. Continuous operation above from the 0°C to 125°C junction temperature. Specifications over the –40°C the specified maximum junction temperature may impair device reliability. to 125°C operating junction temperature range are assured by design,
Note 5:
PWMOUT Duty Ratio is calculated: characterization and correlation with statistical process controls. The Duty = IPWMUP/(IPWMUP + IPWMDN) 3761af 4 For more information www.linear.com/LT3761A Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts