Datasheet LT3795 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 110V LED Controller with Spread Spectrum Frequency Modulation |
| 页数 / 页 | 30 / 4 — ELECTRICAL. CHARACTERISTICS The. denotes the specifications which apply … |
| 文件格式/大小 | PDF / 848 Kb |
| 文件语言 | 英语 |
ELECTRICAL. CHARACTERISTICS The. denotes the specifications which apply over the full operating temperature
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LT3795
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL1 = CTRL2 = 2V, PWM = 5V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Linear Regulator
INTVCC Regulation Voltage l 7.4 7.7 8 V Dropout (VIN-INTVCC) IINTVCC = –10mA, VIN = 4.5V 550 mV INTVCC Current Limit VIN = 110V, INTVCC = 6V 18 mA VIN = 12V, INTVCC = 6V 85 mA INTVCC Shutdown Bias Current if Externally EN/UVLO = 0V, INTVCC = 7V 13 17 µA Driven to 7V INTVCC Undervoltage Lockout 3.8 4 4.1 V INTVCC Undervoltage Lockout Hysteresis 200 mV
Oscillator
Switching Frequency RT = 82.5k l 85 105 125 kHz RT = 19.6k l 340 400 480 kHz RT = 6.65k l 900 1000 1150 kHz Minimum Off-Time (Note 5) 160 ns Minimum On-Time (Note 5) 210 ns Switching Frequency Modulation VRAMP = 2V 70 % RAMP Input Low Threshold 1 V RAMP Input High Threshold 2 V RAMP Pin Source Current RAMP = 0.4V 12 µA RAMP Pin Sink Current RAMP = 1.6V 12 µA
LOGIC Input/Outputs
PWM Input Threshold Rising l 0.96 1 1.04 V PWM Pin Bias Current 10 µA EN/UVLO Threshold Voltage Falling l 1.185 1.220 1.25 V EN/UVLO Rising Hysteresis 20 mV EN/UVLO Input Low Voltage IVIN Drops Below 10µA 0.4 V EN/UVLO Pin Bias Current Low EN/UVLO = 1.15V 2.5 3 3.8 µA EN/UVLO Pin Bias Current High EN/UVLO = 1.30V 10 100 nA OPENLED OUTPUT Low IOPENLED = 0.5mA 300 mV SHORTLED OUTPUT Low ISHORTLED = 0.5mA 300 mV OVLO Threshold Voltage Rising l 1.215 1.25 1.28 V OVLO Falling Hysteresis 28 mV OVLO Pin Input Current 150 nA
Gate Driver
tr NMOS GATE Driver Output Rise Time CL = 3300pF, 10% to 90% 20 ns tf NMOS GATE Driver Output Fall Time CL = 3300pF, 10% to 90% 18 ns NMOS GATE Output Low (VOL) 0.05 V NMOS GATE Output High (VOH) INTVCC – V 0.05 tr Top GATE Driver Output Rise Time CL = 300pF 50 ns tf Top GATE Driver Output Fall Time CL = 300pF 100 ns Top Gate On Voltage (VISP-VTG) ISP = 48V 7 8 V Top Gate Off Voltage (VISP-VTG) PWM = 0V, ISP = 48V 0 0.3 V 3795fc 4 For more information www.linear.com/LT3795 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL1 = CTRL2 = 2V, PWM = 5V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Linear Regulator
INTVCC Regulation Voltage l 7.4 7.7 8 V Dropout (VIN-INTVCC) IINTVCC = –10mA, VIN = 4.5V 550 mV INTVCC Current Limit VIN = 110V, INTVCC = 6V 18 mA VIN = 12V, INTVCC = 6V 85 mA INTVCC Shutdown Bias Current if Externally EN/UVLO = 0V, INTVCC = 7V 13 17 µA Driven to 7V INTVCC Undervoltage Lockout 3.8 4 4.1 V INTVCC Undervoltage Lockout Hysteresis 200 mV
Oscillator
Switching Frequency RT = 82.5k l 85 105 125 kHz RT = 19.6k l 340 400 480 kHz RT = 6.65k l 900 1000 1150 kHz Minimum Off-Time (Note 5) 160 ns Minimum On-Time (Note 5) 210 ns Switching Frequency Modulation VRAMP = 2V 70 % RAMP Input Low Threshold 1 V RAMP Input High Threshold 2 V RAMP Pin Source Current RAMP = 0.4V 12 µA RAMP Pin Sink Current RAMP = 1.6V 12 µA
LOGIC Input/Outputs
PWM Input Threshold Rising l 0.96 1 1.04 V PWM Pin Bias Current 10 µA EN/UVLO Threshold Voltage Falling l 1.185 1.220 1.25 V EN/UVLO Rising Hysteresis 20 mV EN/UVLO Input Low Voltage IVIN Drops Below 10µA 0.4 V EN/UVLO Pin Bias Current Low EN/UVLO = 1.15V 2.5 3 3.8 µA EN/UVLO Pin Bias Current High EN/UVLO = 1.30V 10 100 nA OPENLED OUTPUT Low IOPENLED = 0.5mA 300 mV SHORTLED OUTPUT Low ISHORTLED = 0.5mA 300 mV OVLO Threshold Voltage Rising l 1.215 1.25 1.28 V OVLO Falling Hysteresis 28 mV OVLO Pin Input Current 150 nA
Gate Driver
tr NMOS GATE Driver Output Rise Time CL = 3300pF, 10% to 90% 20 ns tf NMOS GATE Driver Output Fall Time CL = 3300pF, 10% to 90% 18 ns NMOS GATE Output Low (VOL) 0.05 V NMOS GATE Output High (VOH) INTVCC – V 0.05 tr Top GATE Driver Output Rise Time CL = 300pF 50 ns tf Top GATE Driver Output Fall Time CL = 300pF 100 ns Top Gate On Voltage (VISP-VTG) ISP = 48V 7 8 V Top Gate Off Voltage (VISP-VTG) PWM = 0V, ISP = 48V 0 0.3 V 3795fc 4 For more information www.linear.com/LT3795 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts