Datasheet LT3795 (Analog Devices) - 8
| 制造商 | Analog Devices |
| 描述 | 110V LED Controller with Spread Spectrum Frequency Modulation |
| 页数 / 页 | 30 / 8 — TYPICAL PERFORMANCE CHARACTERISTICS. TA = 25°C, unless otherwise noted. … |
| 文件格式/大小 | PDF / 848 Kb |
| 文件语言 | 英语 |
TYPICAL PERFORMANCE CHARACTERISTICS. TA = 25°C, unless otherwise noted. V(IVINP-IVINN) Threshold. vs Temperature
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LT3795
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. V(IVINP-IVINN) Threshold vs Temperature V(IVINP-IVINN) Threshold vs VIN VIVINCOMP vs V(IVINP-IVINN)
65 65 1.8 VIN = 24V VIN = 24V 64 64 1.6 63 63 1.4 62 62 1.2 (mV) 61 (mV) 61 (V) 1.0 60 60 0.8 59 59 V IVINCOMP V (IVINP-IVINN) V (IVINP-IVINN) 0.6 58 58 57 57 0.4 56 56 0.2 55 55 0 –50 –25 0 25 50 75 100 125 150 0 20 40 60 80 100 120 0 20 40 60 80 TEMPERATURE (°C) VIN (V) V(IVINP-IVINN) (mV) 3795 G23 3795 G24 3795 G25
RAMP Pin Sourcing and Sinking NMOS Gate Rise/Fall Time Top Gate (PMOS) Rise/Fall Time Current vs Temperature vs Capacitance vs Capacitance
13 160 800 140 700 12 SINKING 120 600 SOURCING 100 500 11 RISE TIME FALL TIME 80 400 TIME (ns) TIME (ns) 10 60 300 CURRENT (µA) FALL TIME 40 200 9 20 100 RISE TIME 8 0 0 –50 –25 0 25 50 75 100 125 150 0 10 20 30 40 50 0 1 2 3 4 5 6 7 8 9 10 TEMPERATURE (°C) CAPACITANCE (nF) CAPACITANCE (nF) 3795 G26 3795 G27 3795 G28
Top Gate Driver Rising Edge Top Gate Driver Falling Edge
5V PWM 0V 5V PWM 0V 85V 85V TG TG 75V 75V 3795 G29 100ns/DIV 3795 G30 100ns/DIV PMOS VISHAY SILICONIX Si7113DN PMOS VISHAY SILICONIX Si7113DN 3795fc 8 For more information www.linear.com/LT3795 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. V(IVINP-IVINN) Threshold vs Temperature V(IVINP-IVINN) Threshold vs VIN VIVINCOMP vs V(IVINP-IVINN)
65 65 1.8 VIN = 24V VIN = 24V 64 64 1.6 63 63 1.4 62 62 1.2 (mV) 61 (mV) 61 (V) 1.0 60 60 0.8 59 59 V IVINCOMP V (IVINP-IVINN) V (IVINP-IVINN) 0.6 58 58 57 57 0.4 56 56 0.2 55 55 0 –50 –25 0 25 50 75 100 125 150 0 20 40 60 80 100 120 0 20 40 60 80 TEMPERATURE (°C) VIN (V) V(IVINP-IVINN) (mV) 3795 G23 3795 G24 3795 G25
RAMP Pin Sourcing and Sinking NMOS Gate Rise/Fall Time Top Gate (PMOS) Rise/Fall Time Current vs Temperature vs Capacitance vs Capacitance
13 160 800 140 700 12 SINKING 120 600 SOURCING 100 500 11 RISE TIME FALL TIME 80 400 TIME (ns) TIME (ns) 10 60 300 CURRENT (µA) FALL TIME 40 200 9 20 100 RISE TIME 8 0 0 –50 –25 0 25 50 75 100 125 150 0 10 20 30 40 50 0 1 2 3 4 5 6 7 8 9 10 TEMPERATURE (°C) CAPACITANCE (nF) CAPACITANCE (nF) 3795 G26 3795 G27 3795 G28
Top Gate Driver Rising Edge Top Gate Driver Falling Edge
5V PWM 0V 5V PWM 0V 85V 85V TG TG 75V 75V 3795 G29 100ns/DIV 3795 G30 100ns/DIV PMOS VISHAY SILICONIX Si7113DN PMOS VISHAY SILICONIX Si7113DN 3795fc 8 For more information www.linear.com/LT3795 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts