Datasheet LT3956 (Analog Devices) - 7

LT3956 pin FuncTions
NC:
No Internal Connection. These pins may be left floating
FB:
Voltage Loop Feedback Pin. FB is intended for con- or connected to an adjacent pin. stant-voltage regulation or for LED protection/open LED detection. The internal transconductance amplifier with
EN/UVLO:
Shutdown and Undervoltage Detect Pin. An output VC will regulate FB to 1.25V (nominal) through the accurate 1.22V falling threshold with externally program- DC/DC converter. If the FB input is regulating the loop, the mable hysteresis detects when power is OK to enable VMODE pull-down is asserted. This action may signal an switching. Rising hysteresis is generated by the external open LED fault. If FB is driven above the FB threshold (by resistor divider and an accurate internal 2.1µA pull-down an external power supply spike, for example), the VMODE current. Above the 1.24V (nominal) threshold (but below pull-down will be de-asserted and the PWMOUT pin will 6V), EN/UVLO input bias current is sub-µA. Below the be driven low to protect the LEDs from an overcurrent falling threshold, a 2.1µA pull-down current is enabled so event. Do not leave the FB pin open. If not used, connect the user can define the hysteresis with the external resis- to GND. tor selection. An undervoltage condition resets soft-start. Tie to 0.4V, or less, to disable the device and reduce VIN
ISN:
Connection point for the negative terminal of the quiescent current below 1µA. current feedback resistor. If ISN is greater than 2.9V, the LED current can be programmed by ILED = 250mV/RLED
INTVCC:
Regulated supply for internal loads, GATE driver when VCTRL > 1.2V or ILED = (VCTRL –100mV)/(4 • RLED) and PWMOUT driver. Supplied from VIN and regulates to if VCTRL < 1V. Input bias current is typically 20µA. Below 7.15V (typical). INTVCC must be bypassed with a 4.7µF 3V, ISN is an input to the short-circuit protection feature capacitor placed close to the pin. Connect INTVCC directly that forces GATE to 0V if ISP exceeds ISN by more than to VIN if VIN is always less than or equal to 7V. 350mV (typ).
GND:
Ground. The exposed pad, Pin 37, is ground and
ISP:
Connection point for the positive terminal of the current must be soldered directly to the ground plane. feedback resistor. Input bias current for this pin depends
VIN:
Input Supply Pin. Must be locally bypassed with on CTRL pin voltage, as shown in the Typical Performance a 0.22µF (or larger) capacitor to PGND placed close to Characteristics. ISP is an input to the short-circuit protec- the IC. tion feature when ISN is less than 3V.
SW:
The exposed pad, Pin 38, is the drain of the switch-
VC:
Transconductance Error Amplifier Output Pin. This pin ing N-channel MOSFET and must be connected to the is used to stabilize the voltage loop with an RC network. external inductor. This pin is high impedance when PWM is low, a feature that stores the demand current state variable for the next
PGND:
Source terminal of switch and the GND input to PWM high transition. Connect a capacitor between this the switch current comparator. Kelvin connect to the GND pin and GND; a resistor in series with the capacitor is plane close to the IC using Pin 12. Pins 13 to 17 should be recommended for fast transient response. connected external y to the PGND terminals of components in the switching path. See the Board Layout section.
CTRL:
Current Sense Threshold Adjustment Pin. Regula- ting threshold V
PWMOUT:
Buffered Version of the PWM Signal. This pin is (ISP – ISN) is 0.25 • VCTRL plus an offset for 0V < V used to drive the LED load disconnect N-channel MOSFET CTRL < 1V. For VCTRL > 1.2V the current sense threshold is constant at the full-scale value of 250mV. For or level shift. This pin also serves in a protection function 1V < V for the FB overvoltage condition—will toggle if the FB CTRL < 1.2V, the dependence of the current sense threshold upon V input is greater than the FB regulation voltage (V CTRL transitions from a linear function FB) plus to a constant value, reaching 98% of full-scale value by 60mV (typical). The PWMOUT pin is driven from INTVCC. V Use of a MOSFET with gate cut-off voltage higher than CTRL = 1.1V. Connect CTRL to VREF for the 250mV default threshold. Do not leave this pin open. 1V is recommended. 3956f Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration order information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Application Package Description Typical Application Related Parts