Data SheetAD7616-PABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCETable 4. Thermal performance is directly linked to printed circuit board ParameterRating (PCB) design and operating environment. Close attention to V to AGND −0.3 V to +7 V PCB thermal design is required. CC V to AGND −0.3 V to V + 0.3 V θ DRIVE CC JA is the natural convection junction to ambient thermal Analog Input Voltage to AGND1 ±21 V resistance measured in a one cubic foot sealed enclosure. θJC is Digital Input Voltage to AGND −0.3 V to V + 0.3 V the junction to case thermal resistance. DRIVE Digital Output Voltage to AGND −0.3 V to V + 0.3 V DRIVE REFINOUT to AGND −0.3 V to V + 0.3 V Table 5. Thermal Resistance CC Input Current to Any Pin Except Package TypeθθUnitJAJC Supplies1 ±10 mA ST-80-21 41 7.5 °C/W Operating Temperature Range −40°C to +125°C 1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal Storage Temperature Range −65°C to +150°C test board. See JEDEC JESD51. Junction Temperature 150°C Soldering Reflow Pb/Sn Temperature (10 sec to 30 sec) 240 (+0)°C ESD CAUTION Pb-Free Temperature 260 (+0)°C ESD All Pins Except Analog Inputs 2 kV Analog Input Pins Only 8 kV 1 Transient currents of up to 100 mA do not cause silicon controlled rectifier (SCR) latch-up. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 9 of 46 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Universal Timing Specifications Parallel Interface Timing Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS ANALOG INPUT Analog Input Channel Selection Analog Input Ranges Analog Input Impedance Analog Input Clamp Protection Analog Input Antialiasing Filter ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE SHUTDOWN MODE DIGITAL FILTER APPLICATIONS INFORMATION FUNCTIONALITY OVERVIEW POWER SUPPLIES TYPICAL CONNECTIONS DEVICE CONFIGURATION OPERATIONAL MODE INTERNAL/EXTERNAL REFERENCE HARDWARE MODE SOFTWARE MODE RESET FUNCTIONALITY PIN FUNCTION OVERVIEW DIGITAL INTERFACE CHANNEL SELECTION Hardware Mode Software Mode PARALLEL INTERFACE Reading Conversion Results Writing Register Data Reading Register Data SEQUENCER HARDWARE MODE SEQUENCER SOFTWARE MODE SEQUENCER BURST SEQUENCER Hardware Mode Burst Software Mode Burst DIAGNOSTICS DIAGNOSTIC CHANNELS INTERFACE SELF TEST CRC REGISTER SUMMARY ADDRESSING REGISTERS CONFIGURATION REGISTER CHANNEL REGISTER INPUT RANGE REGISTERS Input Range Register A1 Input Range Register A2 Input Range Register B1 Input Range Register B2 SEQUENCER STACK REGISTERS Sequencer Stack Register 0 to Sequencer Stack Register 7 Sequencer Stack Register 8 to Sequencer Stack Register 31 STATUS REGISTER OUTLINE DIMENSIONS ORDERING GUIDE