Datasheet ADAQ7980, ADAQ7988 (Analog Devices) - 4

ADAQ7980/ADAQ7988 Data Sheet
VDD = 3.5 V to 10 V, V+ = 6.3 V to 7.7 V, V− = −2.5 V to −0.2 V, VIO = 1.7 V to 5.5 V, VREF = 5 V, TA = −55°C to +125°C, ADC driver in a unity-gain buffer configuration, and fSAMPLE = 1 MSPS (ADAQ7980) and fSAMPLE = 500 kSPS (ADAQ7988), unless otherwise noted.
Table 3. Parameter Test Conditions/Comments Min Typ Max Unit
REFERENCE Input Voltage Range Voltage at REF pin 2.4 5.1 V Load Current REFOUT 330 µA Buffer Input Resistance REF 50 MΩ Capacitance REF 1 pF Bias Current 550 800 nA Offset Voltage TA = 25°C 13 125 µV Offset Voltage Drift 0.2 1.3 µV/°C Voltage Noise fIN = 100 kHz 5.2 nV/√Hz Voltage Noise 1/f Corner Frequency 8 Hz Current Noise fIN = 100 kHz 0.7 pA/√Hz 0.1 Hz to 10 Hz Voltage Noise 44 nV rms Linear Output Current REFOUT ±40 mA Short-Circuit Current REFOUT sinking/sourcing 85/73 mA ADC DRIVER CHARACTERISTICS Voltage Range IN+, IN−, AMP_OUT 0 VREF V Absolute Input Voltage IN+, IN−, AMP_OUT −0.1 +5.1 V ADCN −0.1 +0.1 V −3 dB Bandwidth G = +1, VAMP_OUT = 0.02 V p-p 37 MHz G = +1, VAMP_OUT = 2 V p-p 35 MHz Bandwidth for 0.1 dB Flatness G = +1, VAMP_OUT = 0.1 V p-p 4 MHz Slew Rate G = +1, VAMP_OUT = 2 V step 110 V/µs G = +1, VAMP_OUT = 5 V step 40 V/µs Input Voltage Noise f = 100 kHz 5.2 nV/√Hz 1/f Corner Frequency 8 Hz 0.1 Hz to 10 Hz Voltage Noise 44 nV rms Input Current Noise f = 100 kHz 0.7 pA/√Hz Bias IN+, IN− 550 800 nA Offset 2.1 nA Input Offset Voltage TA = 25°C 13 125 µV Drift 0.2 1.3 µV/°C Open-Loop Gain 111 dB Input Resistance IN+, IN− Common Mode 50 MΩ Differential Mode 260 kΩ Input Capacitance IN+, IN− 1 pF Input Common-Mode Voltage Range Specified performance −0.1 V+ − 1.3V V Output Overdrive Recovery Time VIN+ = 10% overdrive, fIN = 10 kHz 500 ns Linear Output Current ±40 mA Short-Circuit Current Sinking/sourcing 85/73 mA DIGITAL INPUTS Logic Levels Input Voltage Low (VIL) VIO > 3.0 V −0.3 +0.3 × VIO V VIO ≤ 3.0 V −0.3 +0.1 × VIO V High (VIH) VIO > 3.0 V 0.7 × VIO VIO + 0.3 V VIO ≤ 3.0 V 0.9 × VIO VIO + 0.3 V Rev. A | Page 4 of 49 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY CONFIGURATION SINGLE-SUPPLY CONFIGURATION TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ADC DRIVER INPUT INPUT PROTECTION NOISE CONSIDERATIONS AND SIGNAL SETTLING OPERATION DYNAMIC POWER SCALING (DPS) SLEW ENHANCEMENT EFFECT OF FEEDBACK RESISTOR ON FREQUENCY RESPONSE VOLTAGE REFERENCE INPUT POWER SUPPLY LDO REGULATOR CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION LDO REGULATOR THERMAL CONSIDERATIONS DIGITAL INTERFACE 3-WIRE MODE WITHOUT THE BUSY INDICATOR 3-WIRE MODE WITH THE BUSY INDICATOR 4-WIRE MODE WITHOUT THE BUSY INDICATOR 4-WIRE MODE WITH THE BUSY INDICATOR CHAIN MODE WITHOUT THE BUSY INDICATOR CHAIN MODE WITH THE BUSY INDICATOR APPLICATION CIRCUITS NONUNITY GAIN CONFIGURATIONS INVERTING CONFIGURATION WITH LEVEL SHIFT USING THE ADAQ7980/ADAQ7988 WITH ACTIVE FILTERS APPLICATIONS INFORMATION LAYOUT EVALUATING THE PERFORMANCE OF THE ADAQ7980/ADAQ7988 OUTLINE DIMENSIONS ORDERING GUIDE