Datasheet AD7175-2 (Analog Devices)

24-Bit, 250 kSPS, Sigma-Delta ADC with 20 µs Settling and True Rail-to-Rail Buffers Data Sheet AD7175-2
FEATURES GENERAL DESCRIPTION Fast and flexible output rate: 5 SPS to 250 kSPS
The AD7175-2 is a low noise, fast settling, multiplexed, 2-/4-
Channel scan data rate of 50 kSPS/channel (20 µs settling)
channel (fully/pseudo differential) Σ-Δ analog-to-digital converter
Performance specifications
(ADC) for low bandwidth inputs. It has a maximum channel
17.2 noise free bits at 250 kSPS
scan rate of 50 kSPS (20 µs) for fully settled data. The output
20 noise free bits at 2.5 kSPS
data rates range from 5 SPS to 250 kSPS.
24 noise free bits at 20 SPS
The AD7175-2 integrates key analog and digital signal condition-
INL: ±1 ppm of FSR
ing blocks to allow users to configure an individual setup for
85 dB rejection of 50 Hz and 60 Hz with 50 ms settling
each analog input channel in use. Each feature can be user selected
User configurable input channels
on a per channel basis. Integrated true rail-to-rail buffers on the
2 fully differential channels or 4 single-ended channels
analog inputs and external reference inputs provide easy to drive
Crosspoint multiplexer
high impedance inputs. The precision 2.5 V low drift (2 ppm/°C)
On-chip 2.5 V reference (±2 ppm/°C drift)
band gap internal reference (with output reference buffer) adds
True rail-to-rail analog and reference input buffers
embedded functionality to reduce external component count.
Internal or external clock Power supply: AVDD1 = 5 V, AVDD2 = IOVDD = 2 V to 5 V
The digital filter allows simultaneous 50 Hz/60 Hz rejection at
Split supply with AVDD1/AVSS at ±2.5 V
27.27 SPS output data rate. The user can switch between
ADC current: 8.4 mA
different filter options according to the demands of each
Temperature range: −40°C to +105°C
channel in the application. The ADC automatically switches
3- or 4-wire serial digital interface (Schmitt trigger on SCLK)
through each selected channel. Further digital processing
Serial port interface (SPI), QSPI, MICROWIRE, and DSP
functions include offset and gain calibration registers,
compatible
configurable on a per channel basis.
APPLICATIONS
The device operates with a 5 V AVDD1, or ±2.5 V AVDD1/AVSS, and 2 V to 5 V AVDD2 and IOVDD supplies. The specified
Process control: PLC/DCS modules
operating temperature range is −40°C to +105°C. The AD7175-2 is
Temperature and pressure measurement
in a 24-lead TSSOP package.
Medical and scientific multichannel instrumentation Chromatography
Note that, throughout this data sheet, the dual function pin names are referenced by the relevant function only.
FUNCTIONAL BLOCK DIAGRAM AVDD1 AVDD2 REGCAPA REF– REF+ REFOUT IOVDD REGCAPD AVDD1 BUFFERED 1.8V AVSS 1.8V CROSSPOINT PRECISION LDO LDO MULTIPLEXER REFERENCE INT RAIL-TO-RAIL REF AIN0 AVDD REFERENCE INPUT BUFFERS CS AIN1 SCLK SERIAL Ȉǻ$'& DIGITAL INTERFACE DIN AIN2 FILTER AND CONTROL DOUT/RDY AIN3 RAIL-TO-RAIL ANALOG INPUT GPIO AND XTAL AND INTERNAL SYNC/ERROR BUFFERS MUX CLOCK OSCILLATOR AIN4 AVSS I/O CONTROL CIRCUITRY AD7175-2 TEMPERATURE SENSOR
1 0 -0 8 6 4 2
AVSS GPIO0 GPIO1 XTAL1 XTAL2/CLKIO DGND
1 Figure 1.
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