Datasheet AD7175-2 (Analog Devices) - 7

AD7175-2 Data Sheet
Parameter Test Conditions/Comments Min Typ Max Unit
LOGIC INPUTS Input High Voltage, V 1 INH 2 V ≤ IOVDD < 2.3 V 0.65 × IOVDD V 2.3 V ≤ IOVDD ≤ 5.5 V 0.7 × IOVDD V Input Low Voltage, V 1 INL 2 V ≤ IOVDD < 2.3 V 0.35 × IOVDD V 2.3 V ≤ IOVDD ≤ 5.5 V 0.7 V Hysteresis1 IOVDD ≥ 2.7 V 0.08 0.25 V IOVDD < 2.7 V 0.04 0.2 V Leakage Currents −10 +10 µA LOGIC OUTPUT (DOUT/RDY) Output High Voltage, V 1 OH IOVDD ≥ 4.5 V, ISOURCE = 1 mA 0.8 × IOVDD V 2.7 V ≤ IOVDD < 4.5 V, ISOURCE = 500 µA 0.8 × IOVDD V IOVDD < 2.7 V, ISOURCE = 200 µA 0.8 × IOVDD V Output Low Voltage, V 1 OL IOVDD ≥ 4.5 V, ISINK = 2 mA 0.4 V 2.7 V ≤ IOVDD < 4.5 V, ISINK = 1 mA 0.4 V IOVDD < 2.7 V, ISINK = 400 µA 0.4 V Leakage Current Floating state −10 +10 µA Output Capacitance Floating state 10 pF SYSTEM CALIBRATION1 Full-Scale (FS) Calibration Limit 1.05 × FS V Zero-Scale Calibration Limit −1.05 × FS V Input Span 0.8 × FS 2.1 × FS V POWER REQUIREMENTS Power Supply Voltage AVDD1 to AVSS 4.5 5.5 V AVDD2 to AVSS 2 5.5 V AVSS to DGND −2.75 0 V IOVDD to DGND 2 5.5 V IOVDD to AVSS For AVSS < DGND 6.35 V POWER SUPPLY CURRENTS4 All outputs unloaded, digital inputs connected to IOVDD or DGND Full Operating Mode AVDD1 Current Analog input and reference input 1.4 1.65 mA buffers disabled, external reference Analog input and reference input 1.75 2 mA buffers disabled, internal reference Analog input and reference input 13 16 mA buffers enabled, external reference Each buffer: AIN+, AIN−, REF+, REF− 2.9 mA AVDD2 Current External reference 4.5 5 mA Internal reference 4.75 5.2 mA IOVDD Current External clock 2.5 2.8 mA Internal clock 2.75 3.1 mA External crystal 3 mA Standby Mode (LDO On) Internal reference off, total current 25 µA consumption Internal reference on, total current 425 µA consumption Power-Down Mode Full power-down (including LDO and 5 10 µA internal reference) Rev. B | Page 6 of 62