Datasheet AD7902 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | Dual Pseudo Differential 16-Bit, 1 MSPS PulSAR ADC 12.0 mW in QSOP |
| 页数 / 页 | 29 / 10 — Data Sheet. AD7902. 50000. 46115. 45000. 41352. 40000. 35000. NCE. 30000. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 691 Kb |
| 文件语言 | 英语 |
Data Sheet. AD7902. 50000. 46115. 45000. 41352. 40000. 35000. NCE. 30000. CCURRE 25000. 20000. R O. BE 15000. 11317. 12406. 12174. NUM 10000. 3524. 5000. 2991
该数据表的模型线
文件文字版本
Data Sheet AD7902 50000 50000 46115 45000 45000 41352 40000 40000 S S 35000 NCE 35000 NCE 30000 30000 CCURRE 25000 CCURRE 25000 O O F F 20000 20000 R O R O BE 15000 BE 15000 11317 12406 12174 NUM 10000 NUM 10000 3524 5000 5000 2991 249 521 210 135 33 38 4 0
1
0
1
FA6C FA6D FA6E FA6F FA70 FA71 FA72 FA73 FA74 FA75 FA76
4 414
FABA FABB FABC FABD FABE FABF FAC0 FAC1 FAC2 FAC3 FAC4 FAC5 FAC6 CODES IN HEX
1756- 1756- 1
CODES IN HEX
1 Figure 11. Histogram of a DC Input at the Code Center, VREF = 5 V Figure 14. Histogram of a DC Input at the Code Center, VREF = 2.5 V
50000 94 45000 93 40000 S 35000 NCE 31890 92 30000 28056 B) d CCURRE 25000 91 O F NR ( S 20000 R O 90 BE 15000 NUM 10000 89 3393 5000 2177 19 0 88 F87C F87D F87E F87F F880 F881 F882 F883 F884 F885
412
–10 –9 –8 –7 –6 –5 –4 –3 –2 –1 –0.1
415
CODES IN HEX
1756- 1756- 1
INPUT LEVEL (dB)
1 Figure 12. Histogram of a DC Input at the Code Transition, VREF = 5 V Figure 15. SNR vs. Input Level
100 16.0 –95 SNR 114 98 SINAD 15.5 ENOB –100 96 112 15.0 THD 94 –105 110 B) 14.5 d 92 ts) B) Bi B) d d 108 90 14.0 INAD ( B ( –110 S HD ( DR ( NO T F 88 E S 106 NR, 13.5 S –115 86 13.0 SFDR 104 84 –120 12.5 102 82 80 12.0 –125 100 2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25
413
2.25 2.75 3.25 3.75 4.25 4.75 5.25
416
REFERENCE VOLTAGE (V)
1756- 1
REFERENCE VOLTAGE (V)
1756- 1 Figure 13. SNR, SINAD, and ENOB vs. Reference Voltage Figure 16. THD and SFDR vs. Reference Voltage Rev. B | Page 9 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT POWER SUPPLY DIGITAL INTERFACE CS MODE /CS Mode, 3-Wire Interface Without Busy Indicator /CS Mode, 3-Wire Interface with Busy Indicator /CS Mode, 4-Wire Interface Without Busy Indicator /CS Mode, 4-Wire Interface with Busy Indicator CHAIN MODE Chain Mode Without Busy Indicator Chain Mode with Busy Indicator APPLICATIONS INFORMATION SIMULTANEOUS SAMPLING FUNCTIONAL SAFTEY CONSIDERATIONS LAYOUT EVALUATING PERFORMANCE OF THE AD7902 OUTLINE DIMENSIONS ORDERING GUIDE NOTES
1
0
1
FA6C FA6D FA6E FA6F FA70 FA71 FA72 FA73 FA74 FA75 FA76
4 414
FABA FABB FABC FABD FABE FABF FAC0 FAC1 FAC2 FAC3 FAC4 FAC5 FAC6 CODES IN HEX
1756- 1756- 1
CODES IN HEX
1 Figure 11. Histogram of a DC Input at the Code Center, VREF = 5 V Figure 14. Histogram of a DC Input at the Code Center, VREF = 2.5 V
50000 94 45000 93 40000 S 35000 NCE 31890 92 30000 28056 B) d CCURRE 25000 91 O F NR ( S 20000 R O 90 BE 15000 NUM 10000 89 3393 5000 2177 19 0 88 F87C F87D F87E F87F F880 F881 F882 F883 F884 F885
412
–10 –9 –8 –7 –6 –5 –4 –3 –2 –1 –0.1
415
CODES IN HEX
1756- 1756- 1
INPUT LEVEL (dB)
1 Figure 12. Histogram of a DC Input at the Code Transition, VREF = 5 V Figure 15. SNR vs. Input Level
100 16.0 –95 SNR 114 98 SINAD 15.5 ENOB –100 96 112 15.0 THD 94 –105 110 B) 14.5 d 92 ts) B) Bi B) d d 108 90 14.0 INAD ( B ( –110 S HD ( DR ( NO T F 88 E S 106 NR, 13.5 S –115 86 13.0 SFDR 104 84 –120 12.5 102 82 80 12.0 –125 100 2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25
413
2.25 2.75 3.25 3.75 4.25 4.75 5.25
416
REFERENCE VOLTAGE (V)
1756- 1
REFERENCE VOLTAGE (V)
1756- 1 Figure 13. SNR, SINAD, and ENOB vs. Reference Voltage Figure 16. THD and SFDR vs. Reference Voltage Rev. B | Page 9 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT POWER SUPPLY DIGITAL INTERFACE CS MODE /CS Mode, 3-Wire Interface Without Busy Indicator /CS Mode, 3-Wire Interface with Busy Indicator /CS Mode, 4-Wire Interface Without Busy Indicator /CS Mode, 4-Wire Interface with Busy Indicator CHAIN MODE Chain Mode Without Busy Indicator Chain Mode with Busy Indicator APPLICATIONS INFORMATION SIMULTANEOUS SAMPLING FUNCTIONAL SAFTEY CONSIDERATIONS LAYOUT EVALUATING PERFORMANCE OF THE AD7902 OUTLINE DIMENSIONS ORDERING GUIDE NOTES