Datasheet AD7656A-1 (Analog Devices)

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250 kSPS, 6-Channel, Simultaneous Sampling, Bipolar, 16-Bit ADC Data Sheet AD7656A-1 FEATURES FUNCTIONAL BLOCK DIAGRAM Pin and software compatible with the AD7656A fe aturing VDD CONVST A CONVST B CONVST C AVCC DVCC reduced decoupling requirements 6 independent analog-to-digital converters (ADCs) CS CLK REF True bipolar analog inputs CONTROL OSC SER/PAR SEL LOGIC VDRIVE Pin-/software-selectable ranges: ±10 V or ±5 V STBY Fast throughput rate: 250 kSPS BUF OUTPUT DB8/DOUT A 16-BIT SAR DRIVERS i CMOS process technology V1 T/H Low power: 140 mW at 250 kSPS with 5 V supplies DB6/SCLK High noise performance with wide bandwidth V2 T/H 16-BIT SAR 88 dB SNR at 10 kHz input frequency OUTPUT BUF DB9/DOUT B DRIVERS On-chip reference and reference buffers V3 T/H 16-BIT SAR High speed parallel, serial, and daisy-chain interface modes OUTPUT DRIVERS DB10/DOUT C High speed serial interface V4 T/H Serial peripheral interface (SPI)/QSPI™/MICROWIRE®/DSP 16-BIT SAR DATA/ OUTPUT CONTROL DRIVERS compatible BUF LINES Power-down mode: 315 µW maximum V5 T/H 16-BIT SAR RD 64-lead LQFP WR/REFEN/DIS Built-in power supply sequencing (PSS) robustness solution V6 T/H 16-BIT SAR AD7656A-1 APPLICATIONS
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Power line monitoring and measuring systems VSS AGND DGND
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Instrumentation and control systems
Figure 1.
Multiaxis positioning systems GENERAL DESCRIPTION
The conversion process and data acquisition are controlled The AD7656A-11 is a reduced decoupling pin- and software- using the CONVST x signals and an internal oscillator. Three compatible version of AD7656A. The AD7656A-1 contains six CONVST x pins (CONVST A, CONVST B, and CONVST C) 16-bit, fast, low power successive approximation ADCs in a allow independent, simultaneous sampling of the three ADC package designed on the pairs. The AD7656A-1 has a high speed parallel and serial iCMOS® process (industrial CMOS). interface, al owing the device to interface with microprocessors iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the or digital signal processors (DSPs). In serial interface mode, the development of a wide range of high performance analog ICs, AD7656A-1 has a daisy-chain feature that allows multiple capable of 33 V operation in a footprint that no previous ADCs to connect to a single serial interface. The AD7656A-1 generation of high voltage devices could achieve. Unlike analog can accommodate true bipolar input signals in the ±4 × VREF ICs using conventional CMOS processes, range and the ±2 × V iCMOS components REF range. The AD7656A-1 also contains can accept bipolar input signals while providing increased an on-chip 2.5 V reference. performance, which dramatically reduces power consumption Multifunction pin names may be referenced by their relevant and package size. function only. The AD7656A-1 features throughput rates of to 250 kSPS. It
PRODUCT HIGHLIGHTS
contains wide bandwidth (4.5 MHz), track-and-hold amplifiers 1. Six 16-bit, 250 kSPS ADCs on board. that can handle input frequencies up to 4.5 MHz. 2. Six true bipolar, high impedance analog inputs. 3. High speed parallel and serial interfaces. 4. Reduced decoupling requirements and reduced bill of materials cost compared with the AD7656A. 1 Protected by U.S. Patent No. 6,731,232.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS POWER SUPPLY SEQUENCING THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CONVERTER DETAILS Track-and-Hold Amplifiers Analog Input ADC TRANSFER FUNCTION INTERNAL/EXTERNAL REFERENCE TYPICAL CONNECTION DIAGRAM DRIVING THE ANALOG INPUTS INTERFACE OPTIONS Parallel Interface (SER/PAR/SEL = 0) SOFTWARE SELECTION OF ADCS Changing the Analog Input Range (H/S SEL = 0) Changing the Analog Input Range (H/S SEL = 1) Serial Interface (SER/PAR/SEL = 1) SERIAL READ OPERATION DAISY-CHAIN MODE (DCEN = 1, SER/PAR/SEL = 1) Standby/Partial Power-Down Modes of Operation(SER/PAR/SEL = 0 or SER/PAR/SEL = 1) APPLICATION HINTS LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE