Datasheet AD7091R-2, AD7091R-4, AD7091R-8 (Analog Devices) - 10

AD7091R-2/AD7091R-4/AD7091R-8 Data Sheet Pin No. TSSOP LFCSP Mnemonic Description
18 16 SCLK Serial Clock. This pin acts as the serial clock input. 19 17 CONVST Convert Start Input Signal. Edge triggered logic input. The falling edge of CONVST places the track-and-hold mode into hold mode and initiates a conversion. 20 18 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface operates. Connect decoupling capacitors between VDRIVE and GND. Typical recommended values are 10 µF and 0.1 µF. The voltage range on this pin is 1.8 V to 5.25 V and may be different to the voltage range at VDD. Not 21 EPAD Exposed Pad. The exposed pad is not connected internally. It is recommended that the pad be applicable soldered to GND. Rev. C | Page 10 of 42 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagram ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION REFERENCE POWER SUPPLY DEVICE RESET TYPICAL CONNECTION DIAGRAM ANALOG INPUT DRIVER AMPLIFIER CHOICE REGISTERS ADDRESSING REGISTERS CONVERSION RESULT REGISTER CHANNEL REGISTER CONFIGURATION REGISTER ALERT INDICATION REGISTER CHANNEL x LOW LIMIT REGISTER CHANNEL x HIGH LIMIT REGISTER CHANNEL x HYSTERESIS REGISTER SERIAL PORT INTERFACE READING CONVERSION RESULT WRITING DATA TO THE REGISTERS READING DATA FROM THE REGISTERS POWER-ON DEVICE INITIALIZATION MODES OF OPERATION NORMAL MODE POWER-DOWN MODE ALERT (AD7091R-4 AND AD7091R-8 ONLY) BUSY (AD7091R-4 AND AD7091R-8 ONLY) CHANNEL SEQUENCER DAISY CHAIN OUTLINE DIMENSIONS ORDERING GUIDE