Datasheet ADAS3022 (Analog Devices)

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16-Bit, 1 MSPS, 8-Channel Data Acquisition System Data Sheet ADAS3022 FEATURES
and buffer; and a 16-bit charge redistribution analog-to-digital
Ease of use—16-bit, 1 MSPS complete data acquisition system
converter (ADC) with successive approximation register (SAR)
High impedance, 8-channel input: >500 MΩ
architecture. The ADAS3022 can resolve eight single-ended
Differential input voltage range: ±24.576 V maximum
inputs or four fully differential inputs up to ±24.576 V when
High input common-mode rejection: >100 dB
using ±15 V supplies. In addition, the device can accept the
User-programmable input ranges
commonly used bipolar differential, bipolar single-ended,
Channel sequencer with individual channel gains
pseudo bipolar, or pseudo unipolar input signals, as shown
On-chip 4.096 V reference and buffer
in Table 1, thus enabling the use of almost any direct sensor
Auxiliary input—direct interface to PulSAR ADC inputs
interface.
No latency or pipeline delay (SAR architecture)
The ADAS3022 simplifies design challenges by eliminating
Serial 4-wire, 1.8 V to 5 V SPI-/SPORT-compatible interface
signal buffering, level shifting, amplification/attenuation,
LFCSP package (6 mm × 6 mm)
common-mode rejection, settling time, and any other analog
−40°C to +85°C industrial temperature range
signal conditioning challenge while allowing a smaller form
APPLICATIONS
factor, faster time to market, and lower cost.
Multichannel data acquisition and system monitoring Process control Table 1. Typical Input Range Selection Power line monitoring Signal Input Range, VIN Automated test equipment
Differential
Instrumentation
±1 V ±1.28 V ±2.5 V ±2.56 V
GENERAL DESCRIPTION
±5 V ±5.12 V The ADAS3022 is a complete 16-bit, 1 MSPS, successive approxi- ±10 V ±10.24 V mation–based analog-to-digital data acquisition system, which is Single Ended1 manufactured on Analog Devices, Inc., proprietary iCMOS® high 0 V to 1 V ±1.28 V voltage industrial process technology. The device integrates an 0 V to 2.5 V ±2.56 V 8-channel, low leakage multiplexer; a high impedance program- 0 V to 5 V ±5.12 V mable gain instrumentation amplifier (PGIA) stage with high 0 V to 10 V ±10.24 V common-mode rejection; a precision, low drift 4.096 V reference 1 See Figure 59 and Figure 60 in the Analog Inputs section for more information.
FUNCTIONAL BLOCK DIAGRAM VDDH AVDD DVDD VIO RESET PD DIFF DIFF TO PAIR COM ADAS3022 CNV IN0/IN1 LOGIC/ IN0 BUSY INTERFACE IN1 IN2/IN3 IN2 CS IN3 PulSAR SCK MUX PGIA IN4 IN4/IN5 ADC DIN IN5 IN6 SDO IN6/IN7 IN7 TEMP COM SENSOR BUF REFIN AUX+ REF AUX–
001
VSSH AGND DGND REFx
10516- Figure 1.
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Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Overview ADAS3022 Operation Transfer Function Typical Application Connection Diagram Analog Inputs Input Structure Programmable Gain Common-Mode Operating Range Fully Differential, Antiphase Signals with a Zero Common Mode Fully Differential, Antiphase Signals with a Nonzero Common Mode Differential, Nonantiphase Signals with a Zero Common Mode Single-Ended Signals with a Nonzero DC Offset (Asymmetrical) Single-Ended Signals with a 0 V DC Offset (Symmetrical) Multiplexer Channel Sequencer Auxiliary Input Channel Driver Amplifier Choice Voltage Reference Output/Input Internal Reference External Reference and Internal Buffer External Reference Reference Decoupling Power Supply Core Supplies High Voltage Supplies Power Dissipation Modes Fully Operational Mode Power-Down Mode Conversion Modes Warp Mode (CMS = 0) Normal Mode (CMS = 1, Default) Digital Interface Conversion Control CNV Rising Edge—Start of a Conversion (SOC) BUSY Falling Edge—End of a Conversion (EOC) Reset and Power-Down (PD) Inputs Serial Data Interface CPHA Sampling on the SCK Falling Edge Sampling on the SCK Rising Edge (Alternate Edge) CFG Readback General Considerations Data Access During Conversion—Maximum Throughput General Timing Configuration Register On Demand Conversion Mode Channel Sequencer Details INx and COM Inputs (MUX = 1, TEMPB = 1) INx and COM Inputs with AUX Inputs (MUX = 0, TEMPB = 1) INx and COM Inputs with Temperature Sensor (MUX = 1, TEMPB = 0) INx and COM Inputs with AUX Inputs and Temperature Sensor (MUX = 0, TEMPB = 0) Sequencer Modes Basic Sequencer Mode (SEQ = 11) Update During Sequence (SEQ = 01) Advanced Sequencer Mode (SEQ = 10) Outline Dimensions Ordering Guide