Datasheet AD9637 (Analog Devices) - 2

AD9637* PRODUCT PAGE QUICK LINKS Last Content Update: 06/09/2017 COMPARABLE PARTS TOOLS AND SIMULATIONS
View a parametric search of comparable parts. • Visual Analog • AD9637 IBIS Model
EVALUATION KITS
• AD9637 Evaluation Board
REFERENCE MATERIALS Technical Articles DOCUMENTATION
• MS-2210: Designing Power Supplies for High Speed ADC
Application Notes
• AN-501: Aperture Uncertainty and ADC System
DESIGN RESOURCES
Performance • AD9637 Material Declaration • AN-737: How ADIsimADC Models an ADC • PCN-PDN Information • AN-827: A Resonant Approach to Interfacing Amplifiers to • Quality And Reliability Switched-Capacitor ADCs • Symbols and Footprints • AN-835: Understanding High Speed ADC Testing and Evaluation
DISCUSSIONS
• AN-878: High Speed ADC SPI Control Software View all AD9637 EngineerZone Discussions. • AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual
SAMPLE AND BUY
• AN-935: Designing an ADC Transformer-Coupled Front End Visit the product page to see pricing options.
Data Sheet
• AD9637: Octal, 12-Bit, 40/80 MSPS, Serial LVDS,1.8 V
TECHNICAL SUPPORT
Analog-to-Digital Converter Data Sheet Submit a technical question or find your regional support
User Guides
number. • Evaluating the AD9257/AD9637 Analog to Digital Converters
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
Document Outline Features Applications General Description Functional Block Diagram Product Highlights Revision History Specifications DC Specifications AC Specifications Digital Specifications Switching Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Characteristics ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics AD9637-80 AD9637-40 Equivalent Circuits Theory of Operation Analog Input Considerations Input Common Mode Differential Input Configurations Voltage Reference Internal Reference Connection External Reference Operation Clock Input Considerations Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO/DFS Pin SCLK/DTP Pin CSB Pin RBIAS Pin Built-In Output Test Modes Output Test Modes Serial Port Interface (SPI) Configuration Using the SPI Hardware Interface Configuration Without the SPI SPI Accessible Features Memory Map Reading the Memory Map Register Table Open Locations Default Values Logic Levels Channel-Specific Registers Memory Map Register Table Memory Map Register Descriptions Device Index (Register 0x04 and Register 0x05) Transfer (Register 0xFF) Power Modes (Register 0x08) Bits[7:6]—Open Bits[1:0]—Internal Power-Down Mode Enhancement Control (Register 0x0C) Bits[7:3]—Open Bit 2—Chop Mode Bits[1:0]—Open Output Mode (Register 0x14) Bit 7—Open Bit 6—LVDS-ANSI/LVDS-IEEE Option Bits[5:3]—Open Bit 2—Output Invert Bit 1—Open Bit 0—Output Format Output Adjust (Register 0x15) Bits[7:6]—Open Bits[5:4]—Output Driver Termination Bits[3:1]—Open Bit 0—Output Drive Output Phase (Register 0x16) Bit 7—Open Bits[6:4]—Input Clock Phase Adjust Bits[3:0]—Output Clock Phase Adjust Resolution/Sample Rate Override (Register 0x100) User I/O Control 2 (Register 0x101) Bits[7:1]—Open Bit 0—SDIO Pull-Down User I/O Control 3 (Register 0x102) Bits[7:4]—Open Bit 3—VCM Power-Down Bits[2:0]—Open Applications Information Design Guidelines Power and Ground Recommendations Clock Stability Considerations Exposed Pad Thermal Heat Slug Recommendations VCM Reference Decoupling SPI Port Outline Dimensions Ordering Guide