Datasheet AD9642 (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | 14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter (ADC) |
| 页数 / 页 | 29 / 3 — AD9642. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/15—Rev. A to … |
| 修订版 | B |
| 文件格式/大小 | PDF / 1.2 Mb |
| 文件语言 | 英语 |
AD9642. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 1/15—Rev. A to Rev. B. 7/14—Rev. 0 to Rev. A
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AD9642 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 17 Applications ... 1 ADC Architecture .. 17 Functional Block Diagram .. 1 Analog Input Considerations ... 17 General Description ... 1 Voltage Reference ... 19 Product Highlights ... 1 Clock Input Considerations .. 19 Revision History ... 2 Power Dissipation and Standby Mode .. 20 Specifications ... 3 Digital Outputs ... 20 ADC DC Specifications ... 3 Serial Port Interface (SPI) .. 22 ADC AC Specifications ... 4 Configuration Using the SPI ... 22 Digital Specifications ... 5 Hardware Interface ... 22 Switching Specifications .. 6 SPI Accessible Features .. 23 Timing Specifications .. 7 Memory Map .. 24 Absolute Maximum Ratings .. 8 Reading the Memory Map Register Table ... 24 Thermal Characteristics .. 8 Memory Map Register Table ... 25 ESD Caution .. 8 Applications Information .. 27 Pin Configurations and Function Descriptions ... 9 Design Guidelines .. 27 Typical Performance Characteristics ... 10 Outline Dimensions ... 28 Equivalent Circuits ... 16 Ordering Guide .. 28
REVISION HISTORY 1/15—Rev. A to Rev. B
Changes to Features Section.. 1 Changes to Reading the Memory Map Register Table Section .. 24 Changes to Table 13 .. 26
7/14—Rev. 0 to Rev. A
Changes to Features Section.. 1 Changes to Ful Power Bandwidth Parameter, Table 2 .. 5 Deleted Noise Bandwidth Parameter, Table 2... 5
7/11—Revision 0: Initial Version
Rev. B | Page 2 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ADC DC SPECIFICATIONS ADC AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS Timing Diagram TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ADC ARCHITECTURE ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations VOLTAGE REFERENCE CLOCK INPUT CONSIDERATIONS Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS Digital Output Enable Function (OEB) Timing Data Clock Output (DCO) SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE SPI ACCESSIBLE FEATURES MEMORY MAP READING THE MEMORY MAP REGISTER TABLE Open Locations Default Values Logic Levels Transfer Register Map MEMORY MAP REGISTER TABLE APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations VCM SPI Port OUTLINE DIMENSIONS ORDERING GUIDE
AD9642 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 17 Applications ... 1 ADC Architecture .. 17 Functional Block Diagram .. 1 Analog Input Considerations ... 17 General Description ... 1 Voltage Reference ... 19 Product Highlights ... 1 Clock Input Considerations .. 19 Revision History ... 2 Power Dissipation and Standby Mode .. 20 Specifications ... 3 Digital Outputs ... 20 ADC DC Specifications ... 3 Serial Port Interface (SPI) .. 22 ADC AC Specifications ... 4 Configuration Using the SPI ... 22 Digital Specifications ... 5 Hardware Interface ... 22 Switching Specifications .. 6 SPI Accessible Features .. 23 Timing Specifications .. 7 Memory Map .. 24 Absolute Maximum Ratings .. 8 Reading the Memory Map Register Table ... 24 Thermal Characteristics .. 8 Memory Map Register Table ... 25 ESD Caution .. 8 Applications Information .. 27 Pin Configurations and Function Descriptions ... 9 Design Guidelines .. 27 Typical Performance Characteristics ... 10 Outline Dimensions ... 28 Equivalent Circuits ... 16 Ordering Guide .. 28
REVISION HISTORY 1/15—Rev. A to Rev. B
Changes to Features Section.. 1 Changes to Reading the Memory Map Register Table Section .. 24 Changes to Table 13 .. 26
7/14—Rev. 0 to Rev. A
Changes to Features Section.. 1 Changes to Ful Power Bandwidth Parameter, Table 2 .. 5 Deleted Noise Bandwidth Parameter, Table 2... 5
7/11—Revision 0: Initial Version
Rev. B | Page 2 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ADC DC SPECIFICATIONS ADC AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS Timing Diagram TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ADC ARCHITECTURE ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations VOLTAGE REFERENCE CLOCK INPUT CONSIDERATIONS Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS Digital Output Enable Function (OEB) Timing Data Clock Output (DCO) SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE SPI ACCESSIBLE FEATURES MEMORY MAP READING THE MEMORY MAP REGISTER TABLE Open Locations Default Values Logic Levels Transfer Register Map MEMORY MAP REGISTER TABLE APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations VCM SPI Port OUTLINE DIMENSIONS ORDERING GUIDE