HMCAD1520 v04.1015 HigH Speed Multi-Mode 8/12/14-Bit1000/640/105 MSpS A/d Convertertable 3: pin descriptionsPin nameDescriptionPin Number# of Pins LCLKP LvDs bit clock, positive output 17 1 LCLKn LvDs bit clock, negative output 18 1 FCLKP LvDs frame clock (1X), positive output 19 1 FCLKn LvDs frame clock (1X), negative output 20 1 DP3A LvDs channel 3A, positive output 21 1 Dn3A LvDs channel 3A, negative output 22 1 DP3B LvDs channel 3B, positive output 23 1 Dn3B LvDs channel 3B, negative output 24 1 DP4A LvDs channel 4A, positive output 25 1 0 Dn4A LvDs channel 4A, negative output 26 1 DP4B LvDs channel 4B, positive output 27 1 Dn4B LvDs channel 4B, negative output 28 1 Avss2 Analog ground domain 2 31 1 t AvDD2 Analog power supply domain 2, 1.8v 32 1 M ovDD Digital CMos Inputs supply voltage 33 1 s CLKn negative differential input clock. 34 1 CLKP Positive differential input clock 35 1 s - In4 negative differential input signal, channel 4 37 1 r IP4 Positive differential input signal, channel 4 38 1 e Avss Analog ground 39, 42, 45 3 t In3 negative differential input signal, channel 3 40 1 r IP3 Positive differential input signal, channel 3 41 1 e v In2 negative differential input signal, channel 2 43 1 n IP2 Positive differential input signal, channel 2 44 1 In1 negative differential input signal, channel 1 46 1 o IP1 Positive differential input signal, channel 1 47 1 vCM Common mode output pin, 0.5*AvDD 48 1 /D C Start up initialization A As part of the HMCAD1520 power-on sequence both a reset and a power down cycle have to be applied to ensure correct start-up initialization. reset can be done in one of two ways: 1. By applying a low-going pulse (minimum 20 ns) on the resetn pin (asynchronous). 2. By using the serial interface to set the ‘rst’ bit high. Internal registers are reset to default values when this bit is set. the ‘rst’ bit is self-reset to zero. When using this method, do not apply any low-going pulse on the resetn pin. Power down cycling can be done in one of two ways: 1. By applying a high-going pulse (minimum 20 ns) on the PD pin (asynchronous). 2. By cycling the ‘pd’ bit in register 0Fhex to high (reg value ‘0200’hex) and then low (reg value ‘0000’hex). Informatio For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, n furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other MA 02062-9106One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 0 - 9 rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise Phone: 781-329-4700 • Order online at www.analog.com Phone: 781-329-4700 • Order online at www.analog.com under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 1-800-ANALOG-D Application Support: Phone: 1-800-ANALOG-D