Datasheet AD7944 (Analog Devices) - 4

制造商Analog Devices
描述14-Bit, 2.5 MSPS, PulSAR 15.5 mW ADC in LFCSP
页数 / 页29 / 4 — Data Sheet. AD7944. SPECIFICATIONS. Table 2. Parameter. Test …
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Data Sheet. AD7944. SPECIFICATIONS. Table 2. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet AD7944 SPECIFICATIONS Table 2 Parameter Test Conditions/Comments Min Typ Max Unit

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Data Sheet AD7944 SPECIFICATIONS
AVDD = DVDD = 2.5 V, BVDD = 5 V, VIO = 1.8 V to 2.7 V, VREF = 4.096 V, TA = −40°C to +85°C, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
RESOLUTION 14 Bits ANALOG INPUT Voltage Range (IN+) − (IN−) 0 VREF V Absolute Input Voltage IN+ −0.1 VREF + 0.1 V IN− −0.1 +0.1 V Leakage Current at 25°C Acquisition phase 250 nA Input Impedance See the Analog Inputs section ACCURACY No Missing Codes 14 Bits Differential Nonlinearity Error, DNL −0.90 ±0.25 +0.90 LSB1 Integral Nonlinearity Error, INL −1.00 ±0.25 +1.00 LSB1 Transition Noise 0.4 LSB1 Gain Error2 TMIN to TMAX −15 ±2 +15 LSB1 Gain Error Temperature Drift ±0.8 ppm/°C Zero Error2 TMIN to TMAX −0.65 ±0.08 +0.65 mV Zero Error Temperature Drift 0.55 ppm/°C Power Supply Sensitivity3 AVDD = 2.5 V ± 5% 84.3 dB THROUGHPUT Conversion Rate 0 2.5 MSPS Transient Response Full-scale step 100 ns AC ACCURACY3 Dynamic Range VREF = 4.096 V, internal reference 83.5 84.5 dB VREF = 5.0 V, external reference 84 85 dB Signal-to-Noise Ratio, SNR fIN = 20 kHz VREF = 4.096 V, internal reference 83.5 84 dB VREF = 5.0 V, external reference 84 84.5 dB Spurious-Free Dynamic Range, SFDR fIN = 20 kHz 103 dB Total Harmonic Distortion, THD fIN = 20 kHz, VREF = 4.096 V, internal −102 dB reference Signal-to-Noise-and-Distortion Ratio, fIN = 20 kHz, VREF = 4.096 V 84 dB SINAD SAMPLING DYNAMICS −3 dB Input Bandwidth 19 MHz Aperture Delay 0.7 ns 1 LSB means least significant bit. With the 4.096 V input range, one LSB is 250 µV. 2 See the Terminology section. These specifications include full temperature range variation but not the error contribution from the external reference. 3 All specifications expressed in decibels are referred to a full-scale input FSR and tested with an input signal at 0.5 dB below full scale, unless otherwise specified. Rev. C | Page 3 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION APPLICATION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION CONVERSION MODES OF OPERATION Transfer Functions TYPICAL APPLICATION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT Internal Reference, REF = 4.096 V (PDREF Low) External 1.2 V Reference and Internal Buffer (PDREF High) External Reference (PDREF High, REFIN Low) Reference Decoupling POWER SUPPLY DIGITAL INTERFACE DATA READING OPTIONS Reading During Conversion, Fast Host (Turbo or Normal Mode) Split Reading, Any Speed Host (Turbo or Normal Mode) Reading During Acquisition, Any Speed Host (Turbo or Normal Mode) CS\ MODE, 3-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 3-WIRE WITH BUSY INDICATOR CS\ MODE, 4-WIRE WITHOUT BUSY INDICATOR CS\ MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATIONS INFORMATION LAYOUT EVALUATING AD7944 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE