Datasheet AD7781 (Analog Devices) - 10
| 制造商 | Analog Devices |
| 描述 | 20-Bit, Pin-Programmable, Ultralow Power Sigma-Delta ADC |
| 页数 / 页 | 17 / 10 — AD7781. 524,276. 2.0. 1.5. 1.0. 524,275. 0.5. ( L IN –0.5. 524,274. –1.0. … |
| 文件格式/大小 | PDF / 329 Kb |
| 文件语言 | 英语 |
AD7781. 524,276. 2.0. 1.5. 1.0. 524,275. 0.5. ( L IN –0.5. 524,274. –1.0. –1.5. 524,273. –2.0. 200. 400. 600. 800. 1000. SAMPLE. IN (V). R 400. F –2. –10. –60. –40. –20
该数据表的模型线
文件文字版本
AD7781 524,276 2.0 1.5 1.0 524,275 ) 0.5 FS DE pm 0 p CO ( L IN –0.5 524,274 –1.0 –1.5 524,273 –2.0 0 200 400 600 800 1000
14 17 0
–6 –4 –2 0 2 4 6
0 2- 2-
SAMPLE
16
V
16 08
IN (V)
08 Figure 14. Noise (VREF = AVDD, Update Rate = 10 Hz, Gain = 1) Figure 17. Integral Nonlinearity (VREF = AVDD, Gain = 1)
800 10 8 6 600 4 E V) 2 NC µ E ( R 400 R ET 0 S CU F C F –2 O O –4 200 –6 –8 0 –10 524,274 524,275
15 0 18 0 2-
–60 –40 –20 0 20 40 60 80 100 120
2- 16
CODE TEMPERATURE (°C)
16 08 08 Figure 15. Noise Distribution Histogram Figure 18. Offset vs. Temperature (Gain = 128) (VREF = AVDD, Update Rate = 10 Hz, Gain = 1)
3.0 150 2.5 100 2.0 1.5 50 ) ) 1.0 m p p FS 0.5 0 m R ( p p RO 0 R L ( –50 IN –0.5 N E AI G –1.0 –100 –1.5 –150 –2.0 –2.5
6
–200 –0.04 –0.03 –0.02 –0.01 0 0.01 0.02 0.03 0.04
19 -01
–60 –40 –20 0 20 40 60 80 100 120
02-
V
162 16
IN (V) TEMPERATURE (°C)
08 08 Figure 16. Integral Nonlinearity (VREF = AVDD, Gain = 128) Figure 19. Gain Error vs. Temperature (Gain = 128) Rev. 0 | Page 9 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Circuit and Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION THEORY OF OPERATION FILTER, DATA RATE, AND SETTLING TIME GAIN POWER-DOWN/RESET (PDRST) ANALOG INPUT CHANNEL BIPOLAR CONFIGURATION DATA OUTPUT CODING REFERENCE BRIDGE POWER-DOWN SWITCH DIGITAL INTERFACE APPLICATIONS INFORMATION WEIGH SCALES AD7781 PERFORMANCE IN A WEIGH SCALE SYSTEM EMI RECOMMENDATIONS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
14 17 0
–6 –4 –2 0 2 4 6
0 2- 2-
SAMPLE
16
V
16 08
IN (V)
08 Figure 14. Noise (VREF = AVDD, Update Rate = 10 Hz, Gain = 1) Figure 17. Integral Nonlinearity (VREF = AVDD, Gain = 1)
800 10 8 6 600 4 E V) 2 NC µ E ( R 400 R ET 0 S CU F C F –2 O O –4 200 –6 –8 0 –10 524,274 524,275
15 0 18 0 2-
–60 –40 –20 0 20 40 60 80 100 120
2- 16
CODE TEMPERATURE (°C)
16 08 08 Figure 15. Noise Distribution Histogram Figure 18. Offset vs. Temperature (Gain = 128) (VREF = AVDD, Update Rate = 10 Hz, Gain = 1)
3.0 150 2.5 100 2.0 1.5 50 ) ) 1.0 m p p FS 0.5 0 m R ( p p RO 0 R L ( –50 IN –0.5 N E AI G –1.0 –100 –1.5 –150 –2.0 –2.5
6
–200 –0.04 –0.03 –0.02 –0.01 0 0.01 0.02 0.03 0.04
19 -01
–60 –40 –20 0 20 40 60 80 100 120
02-
V
162 16
IN (V) TEMPERATURE (°C)
08 08 Figure 16. Integral Nonlinearity (VREF = AVDD, Gain = 128) Figure 19. Gain Error vs. Temperature (Gain = 128) Rev. 0 | Page 9 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS Circuit and Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTPUT NOISE AND RESOLUTION THEORY OF OPERATION FILTER, DATA RATE, AND SETTLING TIME GAIN POWER-DOWN/RESET (PDRST) ANALOG INPUT CHANNEL BIPOLAR CONFIGURATION DATA OUTPUT CODING REFERENCE BRIDGE POWER-DOWN SWITCH DIGITAL INTERFACE APPLICATIONS INFORMATION WEIGH SCALES AD7781 PERFORMANCE IN A WEIGH SCALE SYSTEM EMI RECOMMENDATIONS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE