Datasheet AD9239 (Analog Devices) - 4

制造商Analog Devices
描述Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC
页数 / 页41 / 4 — Data Sheet. AD9239. SPECIFICATIONS. Table 1. AD9239BCPZ-170. …
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Data Sheet. AD9239. SPECIFICATIONS. Table 1. AD9239BCPZ-170. AD9239BCPZ-210. AD9239BCPZ-250. Parameter. Temp Min Typ. Max. Min Typ. Unit

Data Sheet AD9239 SPECIFICATIONS Table 1 AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 Parameter Temp Min Typ Max Min Typ Unit

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Data Sheet AD9239 SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = −40°C, TMAX = +85°C, 1.25 V p-p differential input, AIN = −1.0 dBFS, DCS enabled, unless otherwise noted.
Table 1. AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 Parameter
1
Temp Min Typ Max Min Typ Max Min Typ Max Unit
RESOLUTION 12 12 Bits ACCURACY No Missing Codes Full Guaranteed Guaranteed Guaranteed Offset Error 25°C −2 ±12 −2 ±12 −2 ±12 mV Offset Matching 25°C 4 12 4 12 4 12 mV Gain Error 25°C −2.8 +1 +4.7 −2.8 +1 +4.7 −2.8 +1 +4.7 % FS Gain Matching 25°C 0.9 2.7 0.9 2.7 0.9 2.7 % FS Differential Nonlinearity (DNL) Full ±0.28 ±0.6 ±0.28 ±0.6 ±0.3 ±0.6 LSB Integral Nonlinearity (INL) Full ±0.45 ±0.9 ±0.7 ±1.3 ±0.7 ±1.3 LSB ANALOG INPUTS Differential Input Voltage Range2 Full 1.0 1.25 1.5 1.0 1.25 1.5 1.0 1.25 1.5 V p-p Common-Mode Voltage Full 1.4 1.4 1.4 V Input Capacitance 25°C 2 2 2 pF Input Resistance Full 4.3 4.3 4.3 kΩ Analog Bandwidth, Full Power Full 780 780 780 MHz Voltage Common Mode (VCMx) Voltage Output Full 1.4 1.44 1.5 1.4 1.44 1.5 1.4 1.44 1.5 V Current Drive Full 1 1 1 mA Temperature Sensor Output −1.12 −1.12 −1.12 mV/°C Voltage Output Full 739 737 734 mV Current Drive Full 50 50 50 µA POWER SUPPLY AVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V IAVDD Full 535 570 610 650 725 775 mA IDRVDD Full 98 105 111 120 123 133 mA Total Power Dissipation Full 1.139 1.215 1.298 1.386 1.526 1.634 W (Including Output Drivers) Power-Down Dissipation Full 3 3 3 mW Standby Dissipation2 Full 152 173 195 mW CROSSTALK Full −95 −95 −95 dB Overrange Condition3 Full −90 −90 −90 dB 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and details on how these tests were completed. 2 AVDD/DRVDD, with link established. 3 Overrange condition is specified as 6 dB above the full-scale input range. Rev. E | Page 3 of 40 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagram Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Equivalent Circuits Theory of Operation Analog Input Considerations Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation Digital Start-Up Sequence Minimize Skew and Time Misalignment (Optional) Link Initialization (Required) Digital Outputs and Timing Digital Output Scrambler and Error Code Correction Error Correction Code Scramblers Inverter Balance Example Calculating the Parity Bits for the Hamming Code TEMPOUT Pin RBIAS Pin VCMx Pins RESET Pin PDWN Pin SDO Pin SDI/SDIO Pin SCLK Pin CSB Pin PGMx Pins Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Outline Dimensions Ordering Guide