Datasheet AD9239 (Analog Devices) - 5

制造商Analog Devices
描述Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC
页数 / 页41 / 5 — AD9239. Data Sheet. AC SPECIFICATIONS. Table 2. AD9239BCPZ-170. …
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AD9239. Data Sheet. AC SPECIFICATIONS. Table 2. AD9239BCPZ-170. AD9239BCPZ-210. AD9239BCPZ-250. Parameter1. Temp. Min. Typ. Max. Unit

AD9239 Data Sheet AC SPECIFICATIONS Table 2 AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 Parameter1 Temp Min Typ Max Unit

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AD9239 Data Sheet AC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, TMIN = −40°C, TMAX = +85°C, 1.25 V p-p differential input, AIN = −1.0 dBFS, DCS enabled, unless otherwise noted.
Table 2. AD9239BCPZ-170 AD9239BCPZ-210 AD9239BCPZ-250 Parameter1 Temp Min Typ Max Min Typ Max Min Typ Max Unit
SIGNAL-TO-NOISE RATIO (SNR) fIN = 9.7 MHz 25°C 64.5 dB fIN = 84.3 MHz Full 63.5 64.5 63.2 64.2 63.1 64.1 dB fIN = 170.3 MHz 25°C 63.9 dB fIN = 240.3 MHz 25°C 64.1 63.2 63.3 dB SIGNAL-TO-NOISE RATIO (SINAD) fIN = 9.7 MHz 25°C 64.2 dB fIN = 84.3 MHz Full 63.3 64.4 62.8 63.9 62.8 63.8 dB fIN = 170.3 MHz 25°C 63.1 dB fIN = 240.3 MHz 25°C 63.9 63 63.1 dB EFFECTIVE NUMBER OF BITS (ENOB) fIN = 9.7 MHz 25°C 10.4 Bits fIN = 84.3 MHz Full 10.2 10.4 10.1 10.3 10.1 10.3 Bits 4 fIN = 170.3 MHz 25°C 10.2 Bits fIN = 240.3 MHz 25°C 10.3 10.2 10.2 Bits WORST HARMONIC (SECOND) fIN = 9.7 MHz 25°C 90 dBc fIN = 84.3 MHz Full 87.5 78.6 86 77 86 74.5 dBc fIN = 170.3 MHz 25°C 76 dBc fIN = 240.3 MHz 25°C 82 80 82 dBc WORST HARMONIC (THIRD) fIN = 9.7 MHz 25°C 78 dBc fIN = 84.3 MHz Full 79 74 76 72.6 76 72.5 dBc fIN = 170.3 MHz 25°C 74 dBc fIN = 240.3 MHz 25°C 84 77 80 dBc WORST OTHER (EXCLUDING SECOND OR THIRD) fIN = 9.7 MHz 25°C 85 dBc fIN = 84.3 MHz Full 96 86 90 83.7 94 83.6 dBc fIN = 170.3 MHz 25°C 85 dBc fIN = 240.3 MHz 25°C 88 88 85 dBc TWO-TONE INTERMOD DISTORTION (IMD) fIN1 = 140.2 MHz, fIN2 = 141.3 MHz, 25°C 78 77 76 dBc AIN1 and AIN2 = −7.0 dBFS fIN1 = 170.2 MHz, fIN2 = 171.3 MHz, 25°C 77 76 dBc AIN1 and AIN2 = −7.0 dBFS2 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and details on how these tests were completed. 2 Tested at 210 MSPS and 250 MSPS only. Rev. E | Page 4 of 40 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagram Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Description Typical Performance Characteristics Equivalent Circuits Theory of Operation Analog Input Considerations Differential Input Configurations Single-Ended Input Configuration Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation Digital Start-Up Sequence Minimize Skew and Time Misalignment (Optional) Link Initialization (Required) Digital Outputs and Timing Digital Output Scrambler and Error Code Correction Error Correction Code Scramblers Inverter Balance Example Calculating the Parity Bits for the Hamming Code TEMPOUT Pin RBIAS Pin VCMx Pins RESET Pin PDWN Pin SDO Pin SDI/SDIO Pin SCLK Pin CSB Pin PGMx Pins Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Outline Dimensions Ordering Guide