Datasheet AD7699 (Analog Devices) - 8

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AD7699 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DD N3 N2 V I I N1I N0I 20 19 18 17 16 VDD 1 15 VIO REF 2 14 SDO AD7699 REFIN 3 13 SCK TOP VIEW GND 4 (Not to Scale) 12 DIN GND 5 11 CNV 6 7 8 9 10 N4 M I N5I N6I N7I CO NOTES 1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS, IT IS RECOMMENDED THAT THE PAD BE
004
SOLDERED TO THE SYSTEM GROUND PLANE.
07354- Figure 4. 20-Lead LFCSP Pin Configuration
Table 6. 20-Lead LFCSP Pin Function Descriptions Pin No. Mnemonic Type1 Description
1, 20 VDD P Power Supply. Nominally 4.5 to 5.5 V and should be decoupled with 10 μF and 100 nF capacitors. 2 REF AI/O Reference Input/Output. See the Voltage Reference Output/Input section. When the internal reference is enabled, this pin produces 4.096 V. When the internal reference is disabled and the buffer is enabled, REF produces a buffered version of the voltage present on the REFIN pin (VDD – 0.5 V maximum) useful when using low cost, low power references. For improved drift performance, connect a precision reference to REF (0.5 V to VDD). For any reference method, this pin needs decoupling with an external 10 μF capacitor connected as close to REF as possible. See the Reference Decoupling section. 3 REFIN AI/O Internal Reference Output/Reference Buffer Input. See the Voltage Reference Output/Input section. When using the internal reference, the internal unbuffered reference voltage is present and needs decoupling with a 0.1 μF capacitor. When using the internal reference buffer, apply a source between 0.5 V and 4.096 V that is buffered to the REF pin as previously described. 4, 5 GND P Power Supply Ground. 6 to 9 IN4 to IN7 AI Analog Input Channel 4, Analog Input Channel 5, Analog Input Channel 6, and Analog Input Channel 7. 10 COM AI Common Channel Input. All input channels, IN[7:0], can be referenced to a common-mode point of 0 V or VREF/2 V. 11 CNV DI Conversion Input. On the rising edge, CNV initiates the conversion. During conversion, if CNV is held high, the busy indictor is enabled. 12 DIN DI Data Input. This input is used for writing to the 14-bit configuration register. The configuration register can be written to during and after conversion. 13 SCK DI Serial Data Clock Input. This input is used to clock out the data on SDO and clock in data on DIN in an MSB first fashion. 14 SDO DO Serial Data Output. The conversion result is output on this pin and synchronized to SCK. In unipolar modes, conversion results are straight binary; in bipolar modes, conversion results are twos complement. 15 VIO P Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V, 3 V, or 5 V). 16 to 19 IN0 to IN3 AI Analog Input Channel 0, Analog Input Channel 1, Analog Input Channel 2, and Analog Input Channel 3. 21 (EPAD) Exposed The exposed paddle is not connected internally. For increased reliability of the solder joints, it is Paddle recommended that the pad be soldered to the GND plane. (EPAD) 1AI = analog input, AI/O = analog input/output, DI = digital input, DO = digital output, and P = power. Rev. F | Page 8 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAMS Unipolar or Bipolar Bipolar Single Supply ANALOG INPUTS Input Structure Selectable Low-Pass Filter Input Configurations Sequencer Examples Source Resistance DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE OUTPUT/INPUT Internal Reference/Temperature Sensor External Reference and Internal Buffer External Reference Reference Decoupling POWER SUPPLY SUPPLYING THE ADC FROM THE REFERENCE DIGITAL INTERFACE READING/WRITING DURING CONVERSION, FAST HOSTS READING/WRITING DURING ACQUISITION, ANY SPEED HOSTS READING/WRITING SPANNING CONVERSION, ANY SPEED HOST CONFIGURATION REGISTER, CFG GENERAL TIMING WITHOUT A BUSY INDICATOR GENERAL TIMING WITH A BUSY INDICATOR READ/WRITE SPANNING CONVERSION WITHOUT A BUSY INDICATOR READ/WRITE SPANNING CONVERSION WITH A BUSY INDICATOR CHANNEL SEQUENCER Examples APPLICATION HINTS LAYOUT EVALUATING AD7699 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE