Datasheet AD7366-5, AD7367-5 (Analog Devices) - 5

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AD7366-5/AD7367-5 AD7367-5 SPECIFICATIONS
AVCC = DVCC = 4.75 V to 5.25 V; VDD = 5 V to 16.5 V; VSS = −16.5 V to −5 V; VDRIVE = 2.7 V to 5.25 V; fSAMPLE = 500 kSPS; fSCLK = 20 MHz; VREF = 2.5 V internal/external; TA = −40°C to +85°C, unless otherwise noted.
Table 3. Parameter Min Typ Max Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 50 kHz sine wave Signal-to-Noise Ratio (SNR)1 74 76 dB Signal-to-Noise (+ Distortion) Ratio (SINAD)1 73 75 dB Total Harmonic Distortion (THD)1 −84 −78 dB Spurious-Free Dynamic Range (SFDR)1 −87 −79 dB Intermodulation Distortion (IMD)1 fa = 49 kHz, fb = 51 kHz Second-Order Terms −91 dB Third-Order Terms −89 dB Channel-to-Channel Isolation1 −90 dB SAMPLE AND HOLD Aperture Delay2 10 ns Aperture Jitter2 40 ps Aperture Delay Matching2 ±100 ps Full Power Bandwidth 35 MHz @ 3 dB, ±10 V range 8 MHz @ 0.1 dB, ±10 V range DC ACCURACY Resolution 14 Bits Integral Nonlinearity (INL)1 ±2 ±3.5 LSB Differential Nonlinearity (DNL)1 ±0.5 ±0.90 LSB Guaranteed no missed codes to 14 bits Positive Full-Scale Error1 ±4 ±25 LSB ±5 V and ±10 V analog input range ±5 ±25 LSB 0 V to 10 V analog input range Positive Full-Scale Error Match1 ±3 LSB Matching from ADC A to ADC B ±0.2 LSB Channel-to-channel matching for ADC A and ADC B Zero Code Error1 ±1 ±10 LSB ±5 V and ±10 V analog input range ±5 ±25 LSB 0 V to 10 V analog input range Zero Code Error Match1 ±3 LSB Matching from ADC A to ADC B ±0.2 LSB Channel-to-channel matching for ADC A and ADC B Negative Full-Scale Error1 ±4 ±25 LSB ±5 V and ±10 V analog input range ±5 ±25 LSB 0 V to 10 V analog input range Negative Full-Scale Error Match1 ±3 LSB Matching from ADC A to ADC B ±0.2 LSB Channel-to-channel matching for ADC A and ADC B ANALOG INPUT Input Voltage Ranges ±10 V (Programmed via RANGE Pins) ±5 V 0 to 10 V See Table 7 DC Leakage Current ±0.01 ±1 μA Input Capacitance 9 pF When in track, ±10 V range 13 pF When in track, ±5 V or 0 V to +10 V range Input Impedance 500 kΩ For ±10 V @ 500 kSPS 2.5 MΩ For ±10 V @ 100 kSPS 250 kΩ For ±5 V/0 V to +10 V @ 500 kSPS 1.2 MΩ For ±5 V/0 V to +10 V @ 100 kSPS Rev. B | Page 5 of 28 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7366-5 SPECIFICATIONS AD7367-5 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ANALOG INPUTS TRANSFER FUNCTION Track-and-Hold TYPICAL CONNECTION DIAGRAM DRIVER AMPLIFIER CHOICE VDRIVE REFERENCE MODES OF OPERATION NORMAL MODE SHUTDOWN MODE POWER-UP TIMES SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7366-5/AD7367-5 TO ADSP-218x AD7366-5/AD7367-5 TO ADSP-BF53x AD7366-5/AD7367-5 TO TMS320VC5506 AD7366-5/AD7367-5 TO DSP563xx APPLICATION HINTS LAYOUT AND GROUNDING EVALUATING THE AD7366-5/AD7367-5 OUTLINE DIMENSIONS ORDERING GUIDE