Datasheet AD7631 (Analog Devices) - 2

制造商Analog Devices
描述18-Bit, 250 kSPS, Differential Programmable Input PulSAR® ADC
页数 / 页33 / 2 — AD7631* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. …
修订版B
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AD7631* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. COMPARABLE PARTS. DESIGN RESOURCES. EVALUATION KITS

AD7631* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES EVALUATION KITS

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AD7631* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS DESIGN RESOURCES
View a parametric search of comparable parts. • AD7631 Material Declaration • PCN-PDN Information
EVALUATION KITS
• Quality And Reliability • AD7631 Evaluation Kit • Symbols and Footprints
DOCUMENTATION DISCUSSIONS Application Notes
View all AD7631 EngineerZone Discussions. • AN-931: Understanding PulSAR ADC Support Circuitry • AN-932: Power Supply Sequencing
SAMPLE AND BUY Data Sheet
Visit the product page to see pricing options. • AD7631: 18-Bit, 250 kSPS, Differential Programmable Input PulSAR® ADC Data Sheet
TECHNICAL SUPPORT
Submit a technical question or find your regional support
REFERENCE MATERIALS
number.
Technical Articles
• MS-2210: Designing Power Supplies for High Speed ADC
DOCUMENT FEEDBACK
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure Single-to-Differential Driver VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V)(PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V)(PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 18-Bit Interface (Master or Slave) 16-Bit and 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (MODE[1:0] = 3, EXT/ = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (MODE[1:0] = 3, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES EVALUATING PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE