Datasheet AD7631 (Analog Devices) - 4

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Data Sheet AD7631 SPECIFICATIONS
AVDD = DVDD = 5 V; OVDD = 2.7 V to 5.5 V; VCC = 15 V; VEE = −15 V; VREF = 5 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 2. Parameter Conditions/Comments Min Typ Max Unit
RESOLUTION 18 Bits ANALOG INPUTS Differential Voltage Range, VIN (VIN+) − (VIN−) 0 V to 5 V VIN = 10 V p-p −VREF +VREF V 0 V to 10 V VIN = 20 V p-p −2 VREF +2 VREF V ±5 V VIN = 20 V p-p −2 VREF +2 VREF V ±10 V VIN = 40 V p-p −4 VREF +4 VREF V Operating Voltage Range VIN+, VIN− to AGND 0 V to 5 V −0.1 +5.1 V 0 V to 10 V −0.1 +10.1 V ±5 V −5.1 +5.1 V ±10 V −10.1 +10.1 V Common-Mode Voltage Range VIN+, VIN− 5 V VREF/2 − 0.1 VREF/2 VREF/2 + 0.1 V 10 V VREF − 0.2 VREF VREF + 0.2 V Bipolar Ranges −0.1 0 +0.1 V Analog Input CMRR fIN = 100 kHz 75 dB Input Current 250 kSPS throughput 801 μA Input Impedance See Analog Inputs section THROUGHPUT SPEED Complete Cycle 4.0 μs Throughput Rate 250 kSPS DC ACCURACY Integral Linearity Error2 250 kSPS throughput −2.5 ±1.5 +2.5 LSB3 No Missing Codes 18 Bits Differential Linearity Error2 −1 +2.5 LSB Transition Noise 0.75 LSB Unipolar Zero Error −0.06 +0.06 %FS Bipolar Zero Error −0.03 +0.03 %FS Zero-Error Temperature Drift ±0.5 ppm/°C Bipolar Full-Scale Error −0.09 +0.09 %FS Unipolar Full-Scale Error −0.07 +0.07 %FS Full-Scale Error Temperature Drift ±0.5 ppm/°C Power Supply Sensitivity AVDD = 5 V ± 5% 3 LSB AC ACCURACY Dynamic Range VIN = 0 to 5 V, fIN = 2 kHz, −60 dB 100 101.8 dB4 VIN = all other input ranges, fIN = 2 kHz, −60 dB 100 102.5 dB Signal-to-Noise Ratio VIN = 0 to 5 V, fIN = 2 kHz 99.5 100.5 dB VIN = all other input ranges, fIN = 2 kHz 100 101 dB Signal-to-(Noise + Distortion), SINAD fIN = 2 kHz 100 dB Total Harmonic Distortion fIN = 2 kHz 112 dB Spurious-Free Dynamic Range fIN = 2 kHz 113 dB −3 dB Input Bandwidth VIN = 0 V to 5 V 45 MHz SAMPLING DYNAMICS Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-scale step 500 ns Rev. B | Page 3 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure Single-to-Differential Driver VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V)(PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V)(PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 18-Bit Interface (Master or Slave) 16-Bit and 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface Serial Configuration Interface MASTER SERIAL INTERFACE Internal Clock (MODE[1:0] = 3, EXT/ = Low) Read During Convert (RDC = High) Read After Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (MODE[1:0] = 3, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES EVALUATING PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE