Datasheet AD7762 (Analog Devices)

625 kSPS, 24-Bit, 109 dB Sigma-Delta ADC With On-Chip Buffer Data Sheet AD7762 FEATURES FUNCTIONAL BLOCK DIAGRAM 120 dB dynamic range at 78 kHz output data rate V V IN– IN+ 109 dB dynamic range at 625 kHz output data rate 112 dB SNR at 78 kHz output data rate MULTIBIT AVDD1 DIFF
Σ
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∆
106 dB SNR at 625 kHz output data rate MODULATOR AVDD2 625 kHz maximum fully filtered output word rate AVDD3 VREF+ Programmable over-sampling rate (32× to 256×) AV BUF RECONSTRUCTION DD4 Fully differential modulator input DECAPA/B On-chip differential amplifier for signal buffering RBIAS AD7762 PROGRAMMABLE Low-pass finite impulse response (FIR) filter with default or AGND DECIMATION user-programmable coefficients VDRIVE MCLK CONTROL LOGIC DV Overrange alert bit DD I/O SYNC DGND Digital offset and gain correction registers OFFSET AND GAIN REGISTERS FIR FILTER RESET Filter bypass modes ENGINE Low power and power-down modes Synchronization of multiple devices via SYNC pin CS RD/WR DRDY DB0 TO DB15
05477-001
APPLICATIONS
Figure 1.
Data acquisition systems Vibration analysis Instrumentation GENERAL DESCRIPTION
The AD7762 is a high performance, 24-bit Σ-Δ analog-to- coefficients. The sample rate, filter corner frequencies, and output digital converter (ADC). It combines wide input bandwidth word rate are set by a combination of the external clock frequency and high speed with the benefits of Σ-Δ conversion with a and the configuration registers of the AD7762. performance of 106 dB SNR at 625 kSPS, making it ideal for high speed data acquisition. Wide dynamic range combined The reference voltage supplied to the AD7762 determines the with significantly reduced antialiasing requirements simplify analog input range. With a 4 V reference, the analog input range the design process. An integrated buffer to drive the reference, is ±3.2 V differential biased around a common mode of 2 V. a differential amplifier for signal buffering and level shifting, an This common-mode biasing can be achieved using the on-chip overrange flag, internal gain and offset registers, and a low-pass differential amplifier, further reducing the external signal digital FIR filter make the AD7762 a compact, highly integrated conditioning requirements. data acquisition device requiring minimal peripheral com- The AD7762 is available in an exposed paddle, 64-lead TQFP ponent selection. In addition, the device offers programmable and is specified over the industrial temperature range from decimation rates, and the digital FIR filter can be adjusted if −40°C to +85°C. the default characteristics are not appropriate to the application. The AD7762 is ideal for applications demanding high SNR
Table 1. Related Devices
without a complex front end signal processing design.
Part No. Description
AD7760 24-bit, 2.5 MSPS, 100 dB Σ-Δ, parallel interface The differential input is sampled at up to 40 MSPS by an analog AD7763 24-bit, 625 kSPS, 109 dB Σ-Δ, serial interface modulator. The modulator output is processed by a series of low- pass filters, the final filter having default or user-programmable
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Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Theory of Operation AD7762 Interface Reading Data Sharing the Parallel Bus Writing to the AD7762 Reading Status and Other Registers Clocking the AD7762 Example 1 Example 2 Driving the AD7762 Using the AD7762 Bias Resistor Selection Decoupling and Layout Recommendations Supply Decoupling Additional Decoupling Reference Voltage Filtering Differential Amplifier Components Layout Considerations Programmable FIR Filter Downloading a User-Defined Filter Example Filter Download AD7762 Registers Control Register 1—Reg 0x0001 Default Value 0x001A Control Register 2—Address 0x0002 Default Value 0x009B Status Register (Read Only) Offset Register—Address 0x0003 Non-bitmapped, Default Value 0x0000 Gain Register—Address 0x0004 Non-bitmapped, Default Value 0xA000 Overrange Register—Address 0x0005 Non-bitmapped, Default Value 0xCCCC Outline Dimensions Ordering Guide