Datasheet AD7273, AD7274 (Analog Devices) - 4

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AD7273/AD7274 Parameter B Grade1 Unit2 Test Conditions/Comments
CONVERSION RATE Conversion Time 291 ns max 14 SCLK cycles with SCLK at 48 MHz Track-and-Hold Acquisition Time3 60 ns max Throughput Rate 3 MSPS max See the Serial Interface section POWER RQUIREMENTS VDD 2.35/3.6 V min/V max IDD Digital I/Ps = 0 V or VDD Normal Mode (Static) 1 mA typ VDD = 3 V, SCLK on or off Normal Mode (Operational) 5 mA max VDD = 2.35 V to 3.6 V, fSAMPLE = 3 MSPS 3.8 mA typ VDD = 3 V Partial Power-Down Mode (Static) 34 μA typ Full Power-Down Mode (Static) 2 μA max −40°C to +85°C, typically 0.1 μA 10 μA max 85°C to 125°C Power Dissipation5 Normal Mode (Operational) 18 mW max VDD = 3.6 V , fSAMPLE = 3 MSPS 11.4 mW typ VDD = 3 V Partial Power-Down 102 μW max VDD = 3 V Full Power-Down 7.2 μW max VDD = 3.6 V, −40°C to +85°C 1 Temperature range from −40°C to +125°C. 2 Typical specifications are tested with VDD = 3 V and VREF = 3 V at 25°C. 3 See the Terminology section. 4 Guaranteed by characterization. 5 See the Power vs. Throughput Rate section. Rev. 0 | Page 4 of 28 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS AD7274 SPECIFICATIONS AD7273 SPECIFICATIONS TIMING SPECIFICATIONS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE PARTIAL POWER-DOWN MODE FULL POWER-DOWN MODE POWER-UP TIMES POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7273/AD7274 to ADSP-BF53x APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE AD7273/AD7274 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE