Datasheet AD9229 (Analog Devices) - 7
| 制造商 | Analog Devices |
| 描述 | Quad 12-Bit, 50/65 MSPS, Serial LVDS A/D Converter |
| 页数 / 页 | 41 / 7 — AD9229. SWITCHING SPECIFICATIONS. Table 4. AD9229-50. AD9229-65. Test. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 799 Kb |
| 文件语言 | 英语 |
AD9229. SWITCHING SPECIFICATIONS. Table 4. AD9229-50. AD9229-65. Test. Parameter Temp. Level. Min Typ Max Min Typ Max Unit
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AD9229 SWITCHING SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate, 2 V p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless otherwise noted.
Table 4. AD9229-50 AD9229-65 Test Parameter Temp Level Min Typ Max Min Typ Max Unit
CLOCK Maximum Clock Rate Full VI 50 65 MSPS Minimum Clock Rate Full IV 10 10 MSPS Clock Pulse Width High Full VI 8 10 6.2 7.7 ns (tEH) Clock Pulse Width Low Full VI 8 10 6.2 7.7 ns (tEL) OUTPUT PARAMETERS Propagation Delay (tPD) Full VI 3.3 6.5 7.9 3.3 6.5 7.9 ns Rise Time (tR) Full V 250 250 ps (20% to 80%) Fall Time (tF) Full V 250 250 ps (20% to 80%) FCO Propagation Delay Full V 6.5 6.5 ns (tFCO) DCO Propagation Delay Full V tFCO + tFCO + ns (tCPD) (tSAMPLE/24) (tSAMPLE/24) DCO-to-Data Delay (tDATA) Full IV (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + ps 250 250 250 250 DCO-to-FCO Delay (tFRAME) Full IV (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + ps 250 250 250 250 Data-to-Data Skew Full IV ±100 ±250 ±100 ±250 ps (tDATA-MAX – tDATA-MIN) Wake-Up Time 25°C V 4 4 ms Pipeline Latency Full IV 10 10 CLK cycles APERTURE Aperture Delay (tA) 25°C V 1.8 1.8 ns Aperture Uncertainty 25°C V <1 <1 ps (Jitter) rms OUT-OF-RANGE RECOVERY 25°C V 2 2 CLK TIME cycles Rev. B | Page 6 of 40 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT CONSIDERATIONS Power Dissipation and Power-Down Mode Digital Outputs Timing DTP Pin Voltage Reference Internal Reference Connection External Reference Operation Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS ALTERNATE ANALOG INPUT DRIVE CONFIGURATION OUTLINE DIMENSIONS ORDERING GUIDE
AVDD = 3.0 V, DRVDD = 3.0 V, maximum conversion rate, 2 V p-p differential input, 1.0 V internal reference, AIN = –0.5 dBFS, unless otherwise noted.
Table 4. AD9229-50 AD9229-65 Test Parameter Temp Level Min Typ Max Min Typ Max Unit
CLOCK Maximum Clock Rate Full VI 50 65 MSPS Minimum Clock Rate Full IV 10 10 MSPS Clock Pulse Width High Full VI 8 10 6.2 7.7 ns (tEH) Clock Pulse Width Low Full VI 8 10 6.2 7.7 ns (tEL) OUTPUT PARAMETERS Propagation Delay (tPD) Full VI 3.3 6.5 7.9 3.3 6.5 7.9 ns Rise Time (tR) Full V 250 250 ps (20% to 80%) Fall Time (tF) Full V 250 250 ps (20% to 80%) FCO Propagation Delay Full V 6.5 6.5 ns (tFCO) DCO Propagation Delay Full V tFCO + tFCO + ns (tCPD) (tSAMPLE/24) (tSAMPLE/24) DCO-to-Data Delay (tDATA) Full IV (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + ps 250 250 250 250 DCO-to-FCO Delay (tFRAME) Full IV (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + (tSAMPLE/24) – (tSAMPLE/24) (tSAMPLE/24) + ps 250 250 250 250 Data-to-Data Skew Full IV ±100 ±250 ±100 ±250 ps (tDATA-MAX – tDATA-MIN) Wake-Up Time 25°C V 4 4 ms Pipeline Latency Full IV 10 10 CLK cycles APERTURE Aperture Delay (tA) 25°C V 1.8 1.8 ns Aperture Uncertainty 25°C V <1 <1 ps (Jitter) rms OUT-OF-RANGE RECOVERY 25°C V 2 2 CLK TIME cycles Rev. B | Page 6 of 40 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT CONSIDERATIONS Power Dissipation and Power-Down Mode Digital Outputs Timing DTP Pin Voltage Reference Internal Reference Connection External Reference Operation Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS ALTERNATE ANALOG INPUT DRIVE CONFIGURATION OUTLINE DIMENSIONS ORDERING GUIDE