Datasheet AD7688 (Analog Devices) - 8

制造商Analog Devices
描述500 kSPS 16- BIT Differential PulSAR A/D Converter in µSOIC/QFN
页数 / 页29 / 8 — Data Sheet. AD7688. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. REF. 10 …
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Data Sheet. AD7688. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. REF. 10 VIO. REF 1. VDD. SDI. VDD 2. 9 SDI. IN+. SCK. TOP VIEW. IN+ 3. 8 SCK. IN–

Data Sheet AD7688 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REF 10 VIO REF 1 VDD SDI VDD 2 9 SDI IN+ SCK TOP VIEW IN+ 3 8 SCK IN–

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Data Sheet AD7688 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REF 1 10 VIO REF 1 10 VIO VDD 2 9 SDI AD7688 VDD 2 9 SDI AD7688 IN+ 3 8 SCK TOP VIEW IN+ 3 TOP VIEW 8 SCK IN– 4 (Not to Scale) 7 SDO (Not to Scale)
005
IN– 4 7 SDO GND 5 6 CNV
02973-
GND 5 6 CNV NOTES 1. FOR THE LFCSP PACKAGE ONLY,
006
THE EXPOSED PADDLE MUST BE
973-
CONNECTED TO GND.
02 Figure 5. 10-Lead MSOP Pin Configuration Figure 6. 10-Lead LFCSP Pin Configuration
Table 7. Pin Function Descriptions Pin No. Mnemonic Type1 Fu nction
1 REF AI Reference Input Voltage. The REF range is from 0.5 V to VDD. It is referred to the GND pin. This pin should be decoupled closely to the pin with a 10 μF capacitor. 2 VDD P Power Supply. 3 IN+ AI Differential Positive Analog Input. 4 IN− AI Differential Negative Analog Input. 5 GND P Power Supply Ground. 6 CNV DI Convert Input. This input has multiple functions. On its leading edge, it initiates the conversions and selects the interface mode, chain or CS. In CS mode, it enables the SDO pin when low. In chain mode, the data should be read when CNV is high. 7 SDO DO Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK. 8 SCK DI Serial Data Clock Input. When the part is selected, the conversion result is shifted out by this clock. 9 SDI DI Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as follows: Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a data input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data level on SDI is output on SDO with a delay of 16 SCK cycles. CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can enable the serial output signals when low, and if SDI or CNV is low when the conversion is complete, the BUSY indicator feature is enabled. 10 VIO P Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V, 3 V, or 5 V). EPAD N/A For the LFCSP package only, the exposed paddle must be connected to GND. 1AI = Analog Input, DI = Digital Input, DO = Digital Output, P = Power, and N/A = not applicable. Rev. B | Page 7 of 28 Document Outline Features Applications Application Diagram General Description Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Terminology Typical Performance Characteristics Circuit Information Converter Operation Transfer Functions Typical Connection Diagram Analog Input Driver Amplifier Choice Single-to-Differential Driver Voltage Reference Input Power Supply Supplying the ADC from the Reference Digital Interface /CS Mode 3-Wire, No BUSY Indicator /CS Mode 3-Wire with BUSY Indicator /CS Mode 4-Write, No BUSY Indicator /CS Mode 4-Wire with BUSY Indicator Chain Mode, No BUSY Indicator Chain Mode with BUSY Indicator Application Hints Layout Evaluating the AD7688 Performance Outline Dimensions Ordering Guide