数据表Datasheet AD9248 (Analog Devices)
Datasheet AD9248 (Analog Devices)
制造商 | Analog Devices |
描述 | Dual 14-Bit, 20/40/65 MSPS, 3 V Analog-to-Digital Converter |
页数 / 页 | 49 / 1 — 14-Bit, 20 MSPS/40 MSPS/65 MSPS. Dual A/D Converter. AD9248. FEATURES. … |
修订版 | B |
文件格式/大小 | PDF / 1.1 Mb |
文件语言 | 英语 |
14-Bit, 20 MSPS/40 MSPS/65 MSPS. Dual A/D Converter. AD9248. FEATURES. FUNCTIONAL BLOCK DIAGRAM. Integrated dual 14-bit ADC. AVDD
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文件文字版本
14-Bit, 20 MSPS/40 MSPS/65 MSPS Dual A/D Converter AD9248 FEATURES FUNCTIONAL BLOCK DIAGRAM Integrated dual 14-bit ADC AVDD AGND Single 3 V supply operation (2.7 V to 3.6 V) OTR_A SNR = 71.6 dB (to Nyquist, AD9248-65) VIN+_A 14 14 D13_A TO D0_A SHA ADC OUTPUT SFDR = 80.5 dBc (to Nyquist, AD9248-65) VIN–_A MUX/ OEB_A BUFFERS Low power: 300 mW/channel at 65 MSPS Differential input with 500 MHz, 3 dB bandwidth REFT_A MUX_SELECT CLK_A Exceptional crosstalk immunity > 85 dB REFB_A CLOCK CLK_B DUTY CYCLE Flexible analog input: 1 V p-p to 2 V p-p range VREF STABILIZER DCS Offset binary or twos complement data format SENSE SHARED_REF Clock duty cycle stabilizer AGND 0.5V PWDN_A MODE Output datamux option PWDN_B CONTROL DFS REFT_B APPLICATIONS REFB_B VIN+_B OTR_B Ultrasound equipment SHA 14 ADC OUTPUT 14 D13_B TO D0_B VIN–_B MUX/ Direct conversion or IF sampling receivers BUFFERS OEB_B WB-CDMA, CDMA2000, WiMAX AD9248
001
Battery-powered instruments DRVDD DRGND
04446-
Hand-held scopemeters Low cost digital oscilloscopes
Figure 1. Fabricated on an advanced CMOS process, the AD9248 is
GENERAL DESCRIPTION
available in a Pb-free, space saving, 64-lead LQFP or LFCSP and is specified over the industrial temperature range (−40°C to The AD9248 is a dual, 3 V, 14-bit, 20 MSPS/40 MSPS/65 MSPS +85°C). analog-to-digital converter (ADC). It features dual high performance sample-and hold amplifiers (SHAs) and an
PRODUCT HIGHLIGHTS
integrated voltage reference. The AD9248 uses a multistage 1. Pin-compatible with the AD9238, 12-bit 20 MSPS/ differential pipelined architecture with output error correction 40 MSPS/65 MSPS ADC. logic to provide 14-bit accuracy and to guarantee no missing codes over the full operating temperature range at up to 2. Speed grade options of 20 MSPS, 40 MSPS, and 65 MSPS 65 MSPS data rates. The wide bandwidth, differential SHA allow flexibility between power, cost, and performance to suit allows for a variety of user-selectable input ranges and offsets, an application. including single-ended applications. It is suitable for various 3. Low power consumption: AD9248-65: 65 MSPS = 600 mW, applications, including multiplexed systems that switch full- AD9248-40: 40 MSPS = 330 mW, and AD9248-20: 20 MSPS = scale voltage levels in successive channels and for sampling 180 mW. inputs at frequencies well beyond the Nyquist rate. 4. Typical channel isolation of 85 dB @ fIN = 10 MHz. Dual single-ended clock inputs are used to control all internal 5. The clock duty cycle stabilizer (AD9248-20/AD9248-40/ conversion cycles. A duty cycle stabilizer is available and can AD9248-65) maintains performance over a wide range of compensate for wide variations in the clock duty cycle, allowing clock duty cycles. the converter to maintain excellent performance. The digital 6. Multiplexed data output option enables single-port operation output data is presented in either straight binary or twos from either Data Port A or Data Port B. complement format. Out-of-range signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow.
Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2005–2010 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT AND CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS TIMING DATA FORMAT VOLTAGE REFERENCE Internal Reference Connection External Reference Operation AD9248 LQFP EVALUATION BOARD CLOCK CIRCUITRY ANALOG INPUTS REFERENCE CIRCUITRY DIGITAL CONTROL LOGIC OUTPUTS LQFP EVALUATION BOARD BILL OF MATERIALS (BOM) LQFP EVALUATION BOARD SCHEMATICS LQFP PCB LAYERS DUAL ADC LFCSP PCB POWER CONNECTOR ANALOG INPUTS OPTIONAL OPERATIONAL AMPLIFIER CLOCK VOLTAGE REFERENCE DATA OUTPUTS LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) LFCSP PCB SCHEMATICS LFCSP PCB LAYERS THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE