Datasheet AD7933, AD7934 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 4-Channel, 1.5 MSPS, 12-Bit Parallel ADC with a Sequencer |
| 页数 / 页 | 32 / 5 — AD7933/AD7934. AD7934 SPECIFICATIONS. Table 3. Parameter. Value. Unit. … |
| 修订版 | B |
| 文件格式/大小 | PDF / 780 Kb |
| 文件语言 | 英语 |
AD7933/AD7934. AD7934 SPECIFICATIONS. Table 3. Parameter. Value. Unit. Test Conditions/Comments
该数据表的模型线
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AD7933/AD7934 AD7934 SPECIFICATIONS
VDD = VDRIVE = 2.7 V to 5.25 V, internal/external VREF = 2.5 V, unless otherwise noted. fCLKIN = 25.5 MHz, fSAMPLE = 1.5 MSPS; TA = TMIN to TMAX, unless otherwise noted.
Table 3. Parameter Value
1
Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 50 kHz sine wave Signal-to-Noise + Distortion (SINAD)2 70 dB min Differential mode 68 dB min Single-ended mode Signal-to-Noise Ratio (SNR)2 71 dB min Differential mode 69 dB min Single-ended mode Total Harmonic Distortion (THD)2 −73 dB max −85 dB typ, differential mode −70 dB max −80 dB typ, single-ended mode Peak Harmonic or Spurious Noise (SFDR)2 −73 dB max −82 dB typ Intermodulation Distortion (IMD)2 fa = 30 kHz, fb = 50 kHz Second-Order Terms −86 dB typ Third-Order Terms −90 dB typ Channel-to-Channel Isolation −85 dB typ fIN = 50 kHz, fNOISE = 300 kHz Aperture Delay2 5 ns typ Aperture Jitter2 72 ps typ Full Power Bandwidth2 50 MHz typ @ 3 dB 10 MHz typ @ 0.1 dB DC ACCURACY Resolution 12 Bits Integral Nonlinearity2 ±1 LSB max Differential mode ±1.5 LSB max Single-ended mode Differential Nonlinearity 2 Differential Mode ±0.95 LSB max Guaranteed no missed codes to 12 bits Single-Ended Mode −0.95/+1.5 LSB max Guaranteed no missed codes to 12 bits Single-Ended and Pseudo Differential Input Straight binary output coding Offset Error2 ±6 LSB max Offset Error Match2 ±1 LSB max Gain Error2 ±3 LSB max Gain Error Match2 ±1 LSB max Twos complement output coding Fully Differential Input Positive Gain Error2 ±3 LSB max Positive Gain Error Match2 ±1 LSB max Zero-Code Error2 ±6 LSB max Zero-Code Error Match2 ±1 LSB max Negative Gain Error2 ±3 LSB max Negative Gain Error Match2 ±1 LSB max ANALOG INPUT Single-Ended Input Range 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 Pseudo Differential Input Range VIN+ 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 VIN− −0.3 to +0.7 V typ VDD = 3 V −0.3 to +1.8 V typ VDD = 5 V Fully Differential Input Range3 VIN+ and VIN− VCM ± VREF/2 V VCM = VREF/2, RANGE bit = 0 VIN+ and VIN− VCM ± VREF V VCM = VREF, RANGE bit = 1 DC Leakage Current4 ±1 μA max Input Capacitance 45 pF typ When in track 10 pF typ When in hold Rev. B | Page 5 of 32 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7933 SPECIFICATIONS AD7934 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY CONTROL REGISTER SEQUENCER OPERATION Writing to the Control Register to Program the Sequencer CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT STRUCTURE ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode ANALOG INPUT SELECTION Traditional Multichannel Operation (SEQ0 = SEQ1 = 0) Using the Sequencer: Consecutive Sequence (SEQ0 = 1, SEQ1 = 1) REFERENCE Digital Inputs VDRIVE Input PARALLEL INTERFACE Reading Data from the AD7933/AD7934 Writing Data to the AD7933/AD7934 POWER MODES OF OPERATION Normal Mode (PM1 = PM0 = 0) Autoshutdown (PM1 = 0; PM0 = 1) Autostandby (PM1 = 1; PM0 = 0) Full Shutdown Mode (PM1 = 1; PM0 = 1) POWER vs. THROUGHPUT RATE MICROPROCESSOR INTERFACING AD7933/AD7934 to ADSP-21xx Interface AD7933/AD7934 to ADSP-21065L Interface AD7933/AD7934 to TMS32020, TMS320C25, and TMS320C5x Interface AD7933/AD7934 to 80C186 Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE AD7933/AD7934 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
AD7933/AD7934 AD7934 SPECIFICATIONS
VDD = VDRIVE = 2.7 V to 5.25 V, internal/external VREF = 2.5 V, unless otherwise noted. fCLKIN = 25.5 MHz, fSAMPLE = 1.5 MSPS; TA = TMIN to TMAX, unless otherwise noted.
Table 3. Parameter Value
1
Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 50 kHz sine wave Signal-to-Noise + Distortion (SINAD)2 70 dB min Differential mode 68 dB min Single-ended mode Signal-to-Noise Ratio (SNR)2 71 dB min Differential mode 69 dB min Single-ended mode Total Harmonic Distortion (THD)2 −73 dB max −85 dB typ, differential mode −70 dB max −80 dB typ, single-ended mode Peak Harmonic or Spurious Noise (SFDR)2 −73 dB max −82 dB typ Intermodulation Distortion (IMD)2 fa = 30 kHz, fb = 50 kHz Second-Order Terms −86 dB typ Third-Order Terms −90 dB typ Channel-to-Channel Isolation −85 dB typ fIN = 50 kHz, fNOISE = 300 kHz Aperture Delay2 5 ns typ Aperture Jitter2 72 ps typ Full Power Bandwidth2 50 MHz typ @ 3 dB 10 MHz typ @ 0.1 dB DC ACCURACY Resolution 12 Bits Integral Nonlinearity2 ±1 LSB max Differential mode ±1.5 LSB max Single-ended mode Differential Nonlinearity 2 Differential Mode ±0.95 LSB max Guaranteed no missed codes to 12 bits Single-Ended Mode −0.95/+1.5 LSB max Guaranteed no missed codes to 12 bits Single-Ended and Pseudo Differential Input Straight binary output coding Offset Error2 ±6 LSB max Offset Error Match2 ±1 LSB max Gain Error2 ±3 LSB max Gain Error Match2 ±1 LSB max Twos complement output coding Fully Differential Input Positive Gain Error2 ±3 LSB max Positive Gain Error Match2 ±1 LSB max Zero-Code Error2 ±6 LSB max Zero-Code Error Match2 ±1 LSB max Negative Gain Error2 ±3 LSB max Negative Gain Error Match2 ±1 LSB max ANALOG INPUT Single-Ended Input Range 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 Pseudo Differential Input Range VIN+ 0 to VREF V RANGE bit = 0 0 to 2 × VREF V RANGE bit = 1 VIN− −0.3 to +0.7 V typ VDD = 3 V −0.3 to +1.8 V typ VDD = 5 V Fully Differential Input Range3 VIN+ and VIN− VCM ± VREF/2 V VCM = VREF/2, RANGE bit = 0 VIN+ and VIN− VCM ± VREF V VCM = VREF, RANGE bit = 1 DC Leakage Current4 ±1 μA max Input Capacitance 45 pF typ When in track 10 pF typ When in hold Rev. B | Page 5 of 32 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7933 SPECIFICATIONS AD7934 SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY CONTROL REGISTER SEQUENCER OPERATION Writing to the Control Register to Program the Sequencer CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT STRUCTURE ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode ANALOG INPUT SELECTION Traditional Multichannel Operation (SEQ0 = SEQ1 = 0) Using the Sequencer: Consecutive Sequence (SEQ0 = 1, SEQ1 = 1) REFERENCE Digital Inputs VDRIVE Input PARALLEL INTERFACE Reading Data from the AD7933/AD7934 Writing Data to the AD7933/AD7934 POWER MODES OF OPERATION Normal Mode (PM1 = PM0 = 0) Autoshutdown (PM1 = 0; PM0 = 1) Autostandby (PM1 = 1; PM0 = 0) Full Shutdown Mode (PM1 = 1; PM0 = 1) POWER vs. THROUGHPUT RATE MICROPROCESSOR INTERFACING AD7933/AD7934 to ADSP-21xx Interface AD7933/AD7934 to ADSP-21065L Interface AD7933/AD7934 to TMS32020, TMS320C25, and TMS320C5x Interface AD7933/AD7934 to 80C186 Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE AD7933/AD7934 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE