Datasheet AD9216 (Analog Devices)

10-Bit, 65/80/105 MSPS Dual A/D Converter AD9216
FEATURES FUNCTIONAL BLOCK DIAGRAM Integrated dual 10-bit ADC AVDD AGND Single 3 V supply operation VIN+_A SNR = 57.6 dBc (to Nyquist, AD9216-105) 10 10 D9_A–D0_A SHA ADC OUTPUT SFDR = 74 dBc (to Nyquist, AD9216-105) VIN–_A MUX/ OEB_A Low power: 150 mW/ch at 105 MSPS BUFFERS Differential input with 300 MHz 3 dB bandwidth REFT_A MUX_SELECT Exceptional crosstalk immunity < -80 dB REFB_A CLK_A CLOCK Offset binary or twos complement data format DUTY CYCLE CLK_B VREF Clock duty cycle stabilizer STABILIZER DCS SENSE SHARED_REF APPLICATIONS AGND 0.5V PWDN_A MODE Ultrasound equipment PWDN_B CONTROL IF sampling in communications receivers DFS REFT_B 3G, radio point-to-point, LMDS, MMDS REFB_B Battery-powered instruments 10 OUTPUT 10 VIN+_B D9_B–D0_B Hand-held scopemeters MUX/ SHA ADC BUFFERS VIN–_B OEB_B Low cost digital oscilloscopes AD9216 GENERAL DESCRIPTION DRVDD DRGND
04775-001 Figure 1. The AD9216 is a dual, 3 V, 10-bit, 105 MSPS analog-to-digital converter (ADC). It features dual high performance sample- Fabricated on an advanced CMOS process, the AD9216 is avail- and-hold amplifiers (SHAs) and an integrated voltage reference. able in a space saving, Pb-free, 64-lead LFCSP (9 mm × 9 mm) and The AD9216 uses a multistage differential pipelined archi- is specified over the industrial temperature range (−40°C to tecture with output error correction logic to provide 10-bit +85°C). accuracy and guarantee no missing codes over the full
PRODUCT HIGHLIGHTS
operating temperature range at up to 105 MSPS data rates. The wide bandwidth, differential SHA allows for a variety of 1. Pin compatible with AD9238, dual 12-bit 20 MSPS/40 MSPS/ user selectable input ranges and offsets, including single-ended 65 MSPS ADC and AD9248, dual 14-bit 20 MSPS/40 MSPS/ applications. The AD9216 is suitable for various applications, 65 MSPS ADC. including multiplexed systems that switch full-scale voltage levels in successive channels and for sampling inputs at 2. 105 MSPS capability allows for demanding, high frequency frequencies well beyond the Nyquist rate. applications. Dual single-ended clock inputs are used to control all internal 3. Low power consumption: AD9216–105: 105 MSPS = 300 mW. conversion cycles. A duty cycle stabilizer is available on the 4. The patented SHA input maintains excellent performance for AD9216 and can compensate for wide variations in the clock input frequencies up to 200 MHz and can be configured for duty cycle, allowing the converters to maintain excellent single-ended or differential operation. performance. The digital output data is presented in either straight binary or twos complement format. 5. Typical channel crosstalk of < −80 dB at fIN up to 70 MHz. 6. The clock duty cycle stabilizer maintains performance over a wide range of clock duty cycles.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS LOGIC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT AND CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS OUTPUT CODING TIMING DATA FORMAT VOLTAGE REFERENCE Internal Reference Connection External Reference Operation Shared Reference Mode DUAL ADC LFCSP PCB POWER CONNECTOR ANALOG INPUTS OPTIONAL OPERATIONAL AMPLIFIER CLOCK VOLTAGE REFERENCE DATA OUTPUTS LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) LFCSP PCB SCHEMATICS LFCSP PCB LAYERS THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE