Datasheet AD7997, AD7998 (Analog Devices) - 3

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AD7997/AD7998 AD7997 SPECIFICATIONS
Temperature range for B version is −40°C to +85°C. Unless otherwise noted, VDD = 2.7 V to 5.5 V; REFIN = 2.5 V; For the AD7997-0, all specifications apply for fSCL up to 400 kHz; for the AD7997-1, all specifications apply for fSCL up to 3.4 MHz, unless otherwise noted; TA = TMIN to TMAX.
Table 1. Parameter B Version Unit Test Conditions/Comments
DYNAMIC PERFORMANCE1 FIN = 10 kHz sine wave for fSCL from 1.7 MHz to 3.4 MHz FIN = 1 kHz sine wave for fSCL up to 400 kHz Signal to Noise + Distortion (SINAD)2 61 dB min Total Harmonic Distortion (THD) 2 –75 dB max Peak Harmonic or Spurious Noise (SFDR) 2 –76 dB max Intermodulation Distortion (IMD)2 fa = 10.1 kHz, fb = 9.9 kHz for fSCL from 1.7 MHz to 3.4 MHz fa = 1.1 kHz, fb = 0.9 kHz for fSCL up to 400 kHz Second-Order Terms –86 dB typ Third-Order Terms –86 dB typ Aperture Delay2 10 ns max Aperture Jitter2 50 ps typ Channel-to-Channel Isolation2 –90 dB typ FIN = 108 Hz, see the Terminology section Full-Power Bandwidth2 11 MHz typ @ 3 dB 2 MHz typ @ 0.1 dB DC ACCURACY Resolution 10 Bits Integral Nonlinearity1, 2 ±0.5 LSB max Differential Nonlinearity1, 2 ±0.5 LSB max Guaranteed no missed codes to 10 bits Offset Error2 ±1.5 LSB max Mode 1 (CONVST Mode) ±2.5 LSB max Mode 2 (Command Mode) Offset Error Match2 ±0.5 LSB max Gain Error2 ±1.5 LSB max Gain Error Match2 ±0.5 LSB max ANALOG INPUT Input Voltage Range 0 to REFIN V DC Leakage Current ±1 µA max Input Capacitance 30 pF typ REFERENCE INPUT REFIN Input Voltage Range 1.2 to VDD V min/V max DC Leakage Current ±1 µA max Input Impedance 69 kΩ typ During a conversion LOGIC INPUTS (SDA, SCL) Input High Voltage, VINH 0.7 (VDD) V min Input Low Voltage, VINL 0.3 (VDD) V max Input Leakage Current, IIN ±1 µA max VIN = 0 V or VDD Input Capacitance, C 3 IN 10 pF max Input Hysteresis, VHYST 0.1 (VDD) V min Rev. 0 | Page 3 of 32 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS AD7997 SPECIFICATIONS AD7998 SPECIFICATIONS I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION TYPICAL CONNECTION DIAGRAM ANALOG INPUT INTERNAL REGISTER STRUCTURE ADDRESS POINTER REGISTER CONFIGURATION REGISTER CONVERSION RESULT REGISTER LIMIT REGISTERS DATAHIGH Register CH1/CH2/CH3/CH4 DATALOW Register CH1/CH2/CH3/CH4 Hysteresis Register (CH1/CH2/CH3/CH4) Using the Limit Registers to Store Min/Max Conversion Result ALERT STATUS REGISTER (CH1 TO CH4) CYCLE TIMER REGISTER SAMPLE DELAY AND BIT TRIAL DELAY SERIAL INTERFACE SERIAL BUS ADDRESS WRITING TO THE AD7997/AD7998 WRITING TO THE ADDRESS POINTER REGISTER FOR A SUBSEQUENT REA WRITING A SINGLE BYTE OF DATA TO THE ALERT STATUS REGISTER O WRITING TWO BYTES OF DATA TO A LIMIT, HYSTERESIS, OR CONFIGU READING DATA FROM THE AD7997/AD7998 ALERT/BUSY PIN SMBus ALERT BUSY PLACING THE AD7997-1/AD7998-1 INTOHIGH SPEED MODE THE ADDRESS SELECT (AS) PIN MODES OF OPERATION MODE 1—USING THE PIN MODE 2 – COMMAND MODE MODE 3—AUTOMATIC CYCLE INTERVAL MODE OUTLINE DIMENSIONS ORDERING GUIDE RELATED PARTS IN I2C-COMPATIBLE ADC PRODUCT FAMILY