Datasheet AD7792, AD7793 (Analog Devices) - 4

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AD7792/AD7793 Parameter AD7792B/AD7793B1 Unit Test Conditions/Comments
REFERENCE Internal Reference Internal Reference Initial Accuracy 1.17 ± 0.01% V min/max AVDD = 4 V, TA = 25°C Internal Reference Drift2 4 ppm/°C typ 15 ppm/°C max Power Supply Rejection 85 dB typ External Reference External REFIN Voltage 2.5 V nom REFIN = REFIN(+) − REFIN(−) Reference Voltage Range2 0.1 V min AVDD V max When VREF = AVDD, the differential input must be limited to 0.9 × VREF /gain if the in-amp is active Absolute REFIN Voltage Limits2 GND − 30 mV V min AVDD + 30 mV V max Average Reference Input Current 400 nA/V typ Average Reference Input Current ±0.03 nA/V/°C typ Drift Normal Mode Rejection Same as for analog inputs Common-Mode Rejection 100 dB typ EXCITATION CURRENT SOURCES (IEXC1 and IEXC2) Output Current 10/210/1000 μA nom Initial Tolerance at 25°C ±5 % typ Drift 200 ppm/°C typ Current Matching ±0.5 % typ Matching between IEXC1 and IEXC2; VOUT = 0 V Drift Matching 50 ppm/°C typ Line Regulation (VDD) 2 %/V typ AVDD = 5 V ± 5% Load Regulation 0.2 %/V typ Output Compliance AVDD − 0.65 V max 10 μA or 210 μA currents selected AVDD − 1.1 V max 1 mA currents selected GND − 30 mV V min TEMPERATURE SENSOR Accuracy ±2 °C typ Applies if user calibrates the temperature Sensitivity 0.81 mV/°C typ sensor BIAS VOLTAGE GENERATOR VBIAS AVDD/2 V nom VBIAS Generator Start-Up Time See Figure 10 ms/nF typ Dependent on the capacitance on the AIN pin INTERNAL/EXTERNAL CLOCK Internal Clock Frequency2 64 ± 3% kHz min/max Duty Cycle 50:50 % typ External Clock Frequency 64 kHz nom A 128 kHz external clock can be used if the divide-by-2 function is used (Bit CLK1 = CLK0 = 1) Duty Cycle 45:55 to 55:45 % typ Applies for external 64 kHz clock; a 128 kHz clock can have a less stringent duty cycle LOGIC INPUTS CS2 VINL, Input Low Voltage 0.8 V max DVDD = 5 V 0.4 V max DVDD = 3 V VINH, Input High Voltage 2.0 V min DVDD = 3 V or 5 V Rev. B | Page 4 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTPUT NOISE AND RESOLUTION SPECIFICATIONS EXTERNAL REFERENCE INTERNAL REFERENCE TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 0, 0, 0 STATUS REGISTER RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80 (AD7792)/0x88 (AD7793) MODE REGISTER RS2, RS1, RS0 = 0, 0, 1; Power-On/Reset = 0x000A CONFIGURATION REGISTER RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710 DATA REGISTER RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(00) ID REGISTER RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXA (AD7792)/0xXB (AD7793) IO REGISTER RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000 (AD7792)/0x800000 (AD7793) FULL-SCALE REGISTER RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7792)/0x5XXX00 (AD7793) ADC CIRCUIT INFORMATION OVERVIEW DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL INSTRUMENTATION AMPLIFIER BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS EXCITATION CURRENTS BIAS VOLTAGE GENERATOR REFERENCE RESET AVDD MONITOR CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION TEMPERATURE MEASUREMENT USING A THERMOCOUPLE TEMPERATURE MEASUREMENT USING AN RTD OUTLINE DIMENSIONS ORDERING GUIDE