link to page 25 link to page 4 link to page 25 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 25 link to page 4 link to page 4 link to page 4 link to page 4 link to page 18 link to page 25 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 link to page 4 AD7680SPECIFICATIONS1Table 2. VDD = 4.5 V to 5.5 V, fSCLK = 2.5 MHz, fSAMPLE = 100 kSPS, unless otherwise noted; TA = TMIN to TMAX, unless otherwise noted ParameterA, B Versions1UnitTest Conditions/Comments DYNAMIC PERFORMANCE fIN = 10 kHz sine wave Signal-to-Noise + Distortion (SINAD)2 83 dB min 85 dB typ Signal-to-Noise Ratio (SNR)2 84 dB min 86 dB typ Total Harmonic Distortion (THD)2 −97 dB typ Peak Harmonic or Spurious Noise (SFDR)2 −95 dB typ Intermodulation Distortion (IMD)2 Second-Order Terms −94 dB typ Third-Order Terms −100 dB typ Aperture Delay 20 ns max Aperture Jitter 30 ps typ Full Power Bandwidth 8 MHz typ @ −3 dB 2.2 MHz typ @ −0.1 dB DC ACCURACY No Missing Codes 15 Bits typ Integral Nonlinearity2 ±4 LSB typ Offset Error2 ±1.68 mV max Gain Error2 ±0.038 % FS max ANALOG INPUT Input Voltage Ranges 0 to VDD V DC Leakage Current ±0.3 μA max Input Capacitance 30 pF typ LOGIC INPUTS Input High Voltage, VINH 2.8 V min Input Low Voltage, VINL 0.4 V max Input Current, IIN ±0.3 μA max Typically 10 nA, VIN = 0 V or VDD Input Capacitance, C 2, 3 IN 10 pF max LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA Output Low Voltage, VOL 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±0.3 μA max Floating-State Output Capacitance2, 3 10 pF max Output Coding Straight (Natural) Binary CONVERSION RATE Conversion Time 8 μs max 20 SCLK cycles with SCLK at 2.5 MHz 9.6 μs max 24 SCLK cycles with SCLK at 2.5 MHz Track-and-Hold Acquisition Time 1.5 μs max 400 ns max Sine wave input ≤ 10 kHz Throughput Rate 100 kSPS See the Serial Interface section POWER REQUIREMENTS VDD 4.5/5.5 V min/V max IDD Digital I/PS = 0 V or VDD Normal Mode (Static) 5.2 mA max SCLK on or off. VDD = 5.5 V Normal Mode (Operational) 4.8 mA max fSAMPLE = 100 kSPS. VDD = 5.5 V; 3.3 mA typ Full Power-Down Mode 0.5 μA max SCLK on or off. VDD = 5.5 V Power Dissipation4 VDD = 5.5 V Normal Mode (Operational) 26.4 mW max fSAMPLE = 100 kSPS Full Power-Down 2.75 μW max 1Temperature range as follows: B Version: −40°C to +85°C. 2 See the Terminology section. 3 Sample tested during initial release to ensure compliance. 4 See the Power vs. Throughput Rate section. Rev. A | Page 3 of 24 Document Outline SPECIFICATIONS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ANALOG INPUT ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM Digital Inputs MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER VS. THROUGHPUT RATE SERIAL INTERFACE AD7680 TO ADSP-218x APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE