Datasheet AD7661 (Analog Devices) - 5

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AD7661 Parameter Conditions Min Typ Max Unit
DIGITAL INPUTS Logic Levels VIL –0.3 +0.8 V VIH 2.0 DVDD + 0.3 V IIL –1 +1 µA IIH –1 +1 µA DIGITAL OUTPUTS Data Format5 Pipeline Delay6 VOL ISINK = 1.6 mA 0.4 V VOH ISOURCE = –500 µA OVDD – 0.6 V POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.257 V Operating Current 100 kSPS Throughput AVDD8 With Reference and Buffer 6.2 mA AVDD9 Reference and Buffer Alone 3 mA DVDD10 1.75 mA OVDD10 21 µA Power Dissipation without REF10 100 kSPS Throughput 16 25 mW 1 kSPS Throughput 160 µW Power Dissipation with REF10 100 kSPS Throughput 40 45 mW TEMPERATURE RANGE11 Specified Performance TMIN to TMAX –40 +85 °C 1See Analog Input section. 2LSB means least significant bit. With the 0 V to 2.5 V input range, 1 LSB is 38.15 µV. 3See Definitions of Specifications section. These specifications do not include the error contribution from the external reference. 4All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified. 5Parallel or Serial 16-Bit. 6Conversion results are available immediately after completed conversion. 7 The max should be the minimum of 5.25 V and DVDD + 0.3 V. 8 With REF, PDREF and PDBUF are LOW; without REF, PDREF and PDBUF are HIGH. 9 With PDREF, PDBUF LOW and PD HIGH. 10 Tested in parallel reading mode 11Consult factory for extended temperature range. Rev. 0 | Page 4 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Input Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS BIPOLAR AND WIDER INPUT RANGES LAYOUT EVALUATING THE AD7661’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE