Datasheet AD7652 (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | 16-Bit 500 kSPS PulSAR® Unipolar ADC with Ref |
| 页数 / 页 | 29 / 5 — Parameter Conditions. Min. Typ. Max. Unit |
| 文件格式/大小 | PDF / 804 Kb |
| 文件语言 | 英语 |
Parameter Conditions. Min. Typ. Max. Unit
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Parameter Conditions Min Typ Max Unit
DIGITAL INPUTS Logic Levels VIL –0.3 +0.8 V VIH 2.0 DVDD + 0.3 V IIL –1 +1 µA IIH –1 +1 µA DIGITAL OUTPUTS Data Format5 Pipeline Delay6 VOL ISINK = 1.6 mA 0.4 V VOH ISOURCE = –500 µA OVDD – 0.6 V POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.257 V Operating Current 500 kSPS Throughput AVDD8 With Reference and Buffer 12.2 mA AVDD9 Reference and Buffer Alone 3 mA DVDD10 3.8 mA OVDD10 102 µA Power Dissipation without REF10 500 kSPS Throughput 65 75 mW 1 kSPS Throughput 130 µW Power Dissipation with REF10 500 kSPS Throughput 80 90 mW TEMPERATURE RANGE11 Specified Performance TMIN to TMAX –40 +85 °C 1See Analog In sect put ion. 2LSB means least significant bit. With the 0 V to 2.5 V input range, 1 LSB is 38.15 µV. 3See Definitions of Specifications section. These specifications do not include the error contribution from the external reference. 4All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified. 5Parallel or Serial 16-Bit. 6Conversion results are available immediately after completed conversion. 7 The max should be the minimum of 5.25 V and DVDD + 0.3 V. 8 With REF, PDREF and PDBUF are LOW; without REF, PDREF and PDBUF are HIGH. 9 With PDREF, PDBUF LOW and PD HIGH. 10 Tested in Parallel Reading Mode 11Consult factory for extended temperature range. Rev. 0 | Page 4 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION TYPICAL CONNECTION DIAGRAM POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE SLAVE SERIAL INTERFACE MICROPROCESSOR INTERFACING APPLICATION HINTS BIPOLAR AND WIDER INPUT RANGES LAYOUT EVALUATING THE AD7652’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
Parameter Conditions Min Typ Max Unit
DIGITAL INPUTS Logic Levels VIL –0.3 +0.8 V VIH 2.0 DVDD + 0.3 V IIL –1 +1 µA IIH –1 +1 µA DIGITAL OUTPUTS Data Format5 Pipeline Delay6 VOL ISINK = 1.6 mA 0.4 V VOH ISOURCE = –500 µA OVDD – 0.6 V POWER SUPPLIES Specified Performance AVDD 4.75 5 5.25 V DVDD 4.75 5 5.25 V OVDD 2.7 5.257 V Operating Current 500 kSPS Throughput AVDD8 With Reference and Buffer 12.2 mA AVDD9 Reference and Buffer Alone 3 mA DVDD10 3.8 mA OVDD10 102 µA Power Dissipation without REF10 500 kSPS Throughput 65 75 mW 1 kSPS Throughput 130 µW Power Dissipation with REF10 500 kSPS Throughput 80 90 mW TEMPERATURE RANGE11 Specified Performance TMIN to TMAX –40 +85 °C 1See Analog In sect put ion. 2LSB means least significant bit. With the 0 V to 2.5 V input range, 1 LSB is 38.15 µV. 3See Definitions of Specifications section. These specifications do not include the error contribution from the external reference. 4All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full-scale, unless otherwise specified. 5Parallel or Serial 16-Bit. 6Conversion results are available immediately after completed conversion. 7 The max should be the minimum of 5.25 V and DVDD + 0.3 V. 8 With REF, PDREF and PDBUF are LOW; without REF, PDREF and PDBUF are HIGH. 9 With PDREF, PDBUF LOW and PD HIGH. 10 Tested in Parallel Reading Mode 11Consult factory for extended temperature range. Rev. 0 | Page 4 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITIONS OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION TYPICAL CONNECTION DIAGRAM POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE SLAVE SERIAL INTERFACE MICROPROCESSOR INTERFACING APPLICATION HINTS BIPOLAR AND WIDER INPUT RANGES LAYOUT EVALUATING THE AD7652’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE