link to page 19 Data SheetAD7674ABSOLUTE MAXIMUM RATINGS Table 5. AD7674 Absolute Maximum Ratings1.6mAIOLParameterRating Analog Inputs TO OUTPUT1.4V IN+1, IN−1, REF, REFBUFIN, REFGND AGND − 0.3 V to PINCL to AGND AVDD + 0.3 V 60pF1 Ground Voltage Differences 500 µ AIOH AGND, DGND, OGND ±0.3 V NOTE Supply Voltages 1 IN SERIAL INTERFACE MODES,THE SYNC, SCLK, ANDSDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD AVDD, DVDD, OVDD −0.3 V to +7 V CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM. AVDD to DVDD, AVDD to OVDD ±7 V 03083–0–002 DVDD to OVDD −0.3 V to +7 V Figure 2. Load Circuit for Digital Interface Timing, SDOUT, SYNC, SCLK Digital Inputs −0.3 V to DVDD + 0.3 V Outputs, CL = 10 pF Internal Power Dissipation2 700 mW Internal Power Dissipation3 2.5 W 2V Junction Temperature 150°C 0.8V Storage Temperature Range −65°C to +150°C tDELAYtDELAY Lead Temperature Range 300°C 2V2V (Soldering 10 sec) 0.8V0.8V 03083–0–003 1See the Analog Inputs section. Figure 3. Voltage Reference Levels for Timing 2Specification is for device in free air: 48-Lead LQFP: θJA = 91°C/W, θJC = 30°C/W. 3 Specification is for device in free air: 48-Lead LFCSP: θJA = 26°C/W. ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. B | Page 7 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION Modes of Operation Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Driver Amplifier Choice Single-to-Differential Driver Voltage Reference Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING Serial Peripheral Interface (SPI) APPLICATIONS INFORMATION LAYOUT EVALUATING AD7674 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES