Datasheet AD7739 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 8-Channel, 4 kHz, 24-Bit Sigma-Delta A/D Converter |
| 页数 / 页 | 33 / 4 — Data Sheet. AD7739. SPECIFICATIONS. Table 1. Parameter Min. Typ. Max. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 612 Kb |
| 文件语言 | 英语 |
Data Sheet. AD7739. SPECIFICATIONS. Table 1. Parameter Min. Typ. Max. Unit. Test. Conditions/Comments
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Data Sheet AD7739 SPECIFICATIONS
–40°C to +105°C; AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; REFIN(+) = 2.5 V; REFIN(–) = 0 V, AINCOM = 2.5 V; Internal Buffer On, AIN Range = ±1.25 V; fMCLKIN = 6.144 MHz; unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
ADC PERFORMANCE, CHOPPING ENABLED Conversion Time Rate 372 11840 Hz Configure via conv. time register No Missing Codes1, 2 24 Bits FW ≥ 12 (conversion time ≥ 290 μs) Output Noise See Table 5 Resolution See Table 6 and Table 7 Integral Nonlinearity (INL)2 ±0.0005 ±0.0015 % of FSR Offset Error (Unipolar, Bipolar)3 ±10 μV Before calibration Offset Drift vs. Temperature1 ±25 nV/°C Gain Error3 ±0.2 % Before calibration Gain Drift vs. Temperature1 ±2.5 ppm of FS/°C Positive Full-Scale Error3 ±0.2 % of FSR Before calibration Positive Full-Scale Drift vs. Temp.1 ±2.5 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0030 % of FSR After calibration Common-Mode Rejection 80 95 dB At dc, AIN = 1 V Power Supply Rejection 70 80 dB At dc, AIN = 1 V ADC PERFORMANCE, CHOPPING DISABLED Conversion Time Rate 737 15133 Hz Configure via conv. time register No Missing Codes1, 2 24 Bits FW 12 (conversion time 290 μs) Output Noise See Table 8 Resolution See Table 9 and Table 10 Integral Nonlinearity (INL)2 ±0.0015 % of FSR Offset Error (Unipolar, Bipolar)5 ±1 mV Before calibration Offset Drift vs. Temperature ±1.5 μV/°C Gain Error3 ±0.2 % Before calibration Gain Drift vs. Temperature ±2.5 ppm of FS/°C Positive Full-Scale Error3 ±0.2 % of FSR Before calibration Positive Full-Scale Drift vs. Temp. ±2.5 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0030 % of FSR After calibration Common-Mode Rejection 75 dB At dc, AIN = 1 V Power Supply Rejection 65 dB At dc, AIN = 1 V ANALOG INPUTS Analog Input Voltage1, 6 ±2.5 V Range ±2.5 V 2.5 V Range 0 to 2.5 V ±1.25 V Range ±1.25 V 1.25 V Range 0 to 1.25 V ±0.625 V Range ±0.625 V 0.625 V Range 0 to 0.625 V AIN, AINCOM Common-Mode/ 0.2 AVDD − 0.3 V Absolute Voltage1 Analog Input Slew Rate1, 7 0.5 V/conv. time AIN absolute voltage > 3 V AIN, AINCOM Input Current1, 8 1 5 nA Only one channel, chop disabled Rev. A | Page 3 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Output Noise and Resolution Specification Chopping Enabled Chopping Disabled Register Descriptions Register Access Communications Register 8 Bits, Write-Only Register, Address 0x00 I/O Port Register 8 Bits, Read/Write Register, Address 0x01, Default Value 0x30 + Digital Input Value × 0x40 Revision Register 8 Bits, Read-Only Register, Address 0x02, Default Value 0x09 + Chip Revision × 0x10 Test Register 24 Bits, Read/Write Register, Address 0x03 ADC Status Register 8 Bits, Read-Only Register, Address 0x04, Default Value 0x00 Checksum Register 16 Bits, Read/Write Register, Address 0x05 ADC Zero-Scale Calibration Register 24 Bits, Read/Write Register, Address 0x06, Default Value 0x80 0000 ADC Full-Scale Calibration Register 24 Bits, Read/Write Register, Address 0x07, Default Value 0x80 0000 Channel Data Registers 16-Bit/24-Bit, Read-Only Registers, Address 0x08 to Address 0x0F, Default Width 16 Bits, Default Value 0x8000 Channel Zero-Scale Calibration Registers 24 Bits, Read/Write Registers, Address 0x10 to Address 0x17, Default Value 0x80 0000 Channel Full-Scale Calibration Registers 24 Bits, Read/Write Registers, Address 0x18 to Address 0x1F, Default Value 0x20 0000 Channel Status Registers 8 Bits, Read-Only Registers, Address 0x20 to Address 0x27, Default Value 0x20 × Channel Number Channel Setup Registers 8 Bits, Read/Write Registers, Address 0x28 to Address 0x2F, Default Value 0x00 Channel Conversion Time Registers 8 Bits, Read/Write Registers, Address 0x30 to Address 0x37, Default Value 0x91 Mode Register 8 Bits, Read/Write Register, Address 0x38 to Address 0x3F, Default Value 0x00 Digital Interface Description Hardware Reset Access the AD7739 Registers Single Conversion and Reading Data Dump Mode Continuous Conversion Mode Continuous Read (Continuous Conversion) Mode Circuit Description Analog Inputs Sigma-Delta ADC Chopping Multiplexer, Conversion, and Data Output Timing Frequency Response Extended Voltage Range of the Analog Input Voltage Reference Inputs Reference Detect I/O Port Calibration ADC Zero-Scale Self-Calibration ADC Full-Scale Self-Calibration Per Channel System Calibration Outline Dimensions Ordering Guide
Data Sheet AD7739 SPECIFICATIONS
–40°C to +105°C; AVDD = 5 V ± 5%; DVDD = 2.7 V to 3.6 V, or 5 V ± 5%; REFIN(+) = 2.5 V; REFIN(–) = 0 V, AINCOM = 2.5 V; Internal Buffer On, AIN Range = ±1.25 V; fMCLKIN = 6.144 MHz; unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
ADC PERFORMANCE, CHOPPING ENABLED Conversion Time Rate 372 11840 Hz Configure via conv. time register No Missing Codes1, 2 24 Bits FW ≥ 12 (conversion time ≥ 290 μs) Output Noise See Table 5 Resolution See Table 6 and Table 7 Integral Nonlinearity (INL)2 ±0.0005 ±0.0015 % of FSR Offset Error (Unipolar, Bipolar)3 ±10 μV Before calibration Offset Drift vs. Temperature1 ±25 nV/°C Gain Error3 ±0.2 % Before calibration Gain Drift vs. Temperature1 ±2.5 ppm of FS/°C Positive Full-Scale Error3 ±0.2 % of FSR Before calibration Positive Full-Scale Drift vs. Temp.1 ±2.5 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0030 % of FSR After calibration Common-Mode Rejection 80 95 dB At dc, AIN = 1 V Power Supply Rejection 70 80 dB At dc, AIN = 1 V ADC PERFORMANCE, CHOPPING DISABLED Conversion Time Rate 737 15133 Hz Configure via conv. time register No Missing Codes1, 2 24 Bits FW 12 (conversion time 290 μs) Output Noise See Table 8 Resolution See Table 9 and Table 10 Integral Nonlinearity (INL)2 ±0.0015 % of FSR Offset Error (Unipolar, Bipolar)5 ±1 mV Before calibration Offset Drift vs. Temperature ±1.5 μV/°C Gain Error3 ±0.2 % Before calibration Gain Drift vs. Temperature ±2.5 ppm of FS/°C Positive Full-Scale Error3 ±0.2 % of FSR Before calibration Positive Full-Scale Drift vs. Temp. ±2.5 ppm of FS/°C Bipolar Negative Full-Scale Error4 ±0.0030 % of FSR After calibration Common-Mode Rejection 75 dB At dc, AIN = 1 V Power Supply Rejection 65 dB At dc, AIN = 1 V ANALOG INPUTS Analog Input Voltage1, 6 ±2.5 V Range ±2.5 V 2.5 V Range 0 to 2.5 V ±1.25 V Range ±1.25 V 1.25 V Range 0 to 1.25 V ±0.625 V Range ±0.625 V 0.625 V Range 0 to 0.625 V AIN, AINCOM Common-Mode/ 0.2 AVDD − 0.3 V Absolute Voltage1 Analog Input Slew Rate1, 7 0.5 V/conv. time AIN absolute voltage > 3 V AIN, AINCOM Input Current1, 8 1 5 nA Only one channel, chop disabled Rev. A | Page 3 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Output Noise and Resolution Specification Chopping Enabled Chopping Disabled Register Descriptions Register Access Communications Register 8 Bits, Write-Only Register, Address 0x00 I/O Port Register 8 Bits, Read/Write Register, Address 0x01, Default Value 0x30 + Digital Input Value × 0x40 Revision Register 8 Bits, Read-Only Register, Address 0x02, Default Value 0x09 + Chip Revision × 0x10 Test Register 24 Bits, Read/Write Register, Address 0x03 ADC Status Register 8 Bits, Read-Only Register, Address 0x04, Default Value 0x00 Checksum Register 16 Bits, Read/Write Register, Address 0x05 ADC Zero-Scale Calibration Register 24 Bits, Read/Write Register, Address 0x06, Default Value 0x80 0000 ADC Full-Scale Calibration Register 24 Bits, Read/Write Register, Address 0x07, Default Value 0x80 0000 Channel Data Registers 16-Bit/24-Bit, Read-Only Registers, Address 0x08 to Address 0x0F, Default Width 16 Bits, Default Value 0x8000 Channel Zero-Scale Calibration Registers 24 Bits, Read/Write Registers, Address 0x10 to Address 0x17, Default Value 0x80 0000 Channel Full-Scale Calibration Registers 24 Bits, Read/Write Registers, Address 0x18 to Address 0x1F, Default Value 0x20 0000 Channel Status Registers 8 Bits, Read-Only Registers, Address 0x20 to Address 0x27, Default Value 0x20 × Channel Number Channel Setup Registers 8 Bits, Read/Write Registers, Address 0x28 to Address 0x2F, Default Value 0x00 Channel Conversion Time Registers 8 Bits, Read/Write Registers, Address 0x30 to Address 0x37, Default Value 0x91 Mode Register 8 Bits, Read/Write Register, Address 0x38 to Address 0x3F, Default Value 0x00 Digital Interface Description Hardware Reset Access the AD7739 Registers Single Conversion and Reading Data Dump Mode Continuous Conversion Mode Continuous Read (Continuous Conversion) Mode Circuit Description Analog Inputs Sigma-Delta ADC Chopping Multiplexer, Conversion, and Data Output Timing Frequency Response Extended Voltage Range of the Analog Input Voltage Reference Inputs Reference Detect I/O Port Calibration ADC Zero-Scale Self-Calibration ADC Full-Scale Self-Calibration Per Channel System Calibration Outline Dimensions Ordering Guide