Datasheet AD7466, AD7467, AD7468 (Analog Devices) - 4
| 制造商 | Analog Devices |
| 描述 | 1.6 V Micro-Power 8-Bit ADC |
| 页数 / 页 | 28 / 4 — AD7466/AD7467/AD7468. Parameter B. Version. Unit. Test. … |
| 修订版 | C |
| 文件格式/大小 | PDF / 460 Kb |
| 文件语言 | 英语 |
AD7466/AD7467/AD7468. Parameter B. Version. Unit. Test. Conditions/Comments
该数据表的模型线
文件文字版本
link to page 22 link to page 20
AD7466/AD7467/AD7468 Parameter B Version Unit Test Conditions/Comments
LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA, VDD = 1.6 V to 3.6 V Output Low Voltage, VOL 0.2 V max ISINK = 200 μA Floating-State Leakage Current ±1 μA max Floating-State Output Capacitance 10 pF max Output Coding Straight (natural) binary CONVERSION RATE Conversion Time 4.70 μs max 16 SCLK cycles with SCLK at 3.4 MHz Throughput Rate 200 kSPS max See the Serial Interface section POWER REQUIREMENTS VDD 1.6/3.6 V min/max IDD Digital inputs = 0 V or VDD Normal Mode (Operational) 300 μA max VDD = 3 V, fSAMPLE = 100 kSPS 110 μA typ VDD = 3 V, fSAMPLE = 50 kSPS 20 μA typ VDD = 3 V, fSAMPLE = 10 kSPS 240 μA max VDD = 2.5 V, fSAMPLE = 100 kSPS 80 μA typ VDD = 2.5 V, fSAMPLE = 50 kSPS 16 μA typ VDD = 2.5 V, fSAMPLE = 10 kSPS 165 μA max VDD = 1.8 V, fSAMPLE = 100 kSPS 50 μA typ VDD = 1.8 V, fSAMPLE = 50 kSPS 10 μA typ VDD = 1.8 V, fSAMPLE = 10 kSPS Power-Down Mode 0.1 μA max SCLK on or off, typically 8 nA Power Dissipation See the Power Consumption section Normal Mode (Operational) 0.9 mW max VDD = 3 V, fSAMPLE = 100 kSPS 0.6 mW max VDD = 2.5 V, fSAMPLE = 100 kSPS 0.3 mW max VDD = 1.8 V, fSAMPLE = 100 kSPS Power-Down Mode 0.3 μW max VDD = 3 V Rev. C | Page 4 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7466 AD7467 AD7468 TIMING SPECIFICATIONS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS DYNAMIC PERFORMANCE CURVES DC ACCURACY CURVES POWER REQUIREMENT CURVES TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS NORMAL MODE POWER CONSUMPTION Power Consumption Example 1 Power Consumption Example 2 SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7466/AD7467/AD7468 to TMS320C541 Interface AD7466/AD7467/AD7468 to ADSP-218x Interface AD7466/AD7467/AD7468 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE PERFORMANCE OF THE AD7466 AND AD7467 OUTLINE DIMENSIONS ORDERING GUIDE
AD7466/AD7467/AD7468 Parameter B Version Unit Test Conditions/Comments
LOGIC OUTPUTS Output High Voltage, VOH VDD − 0.2 V min ISOURCE = 200 μA, VDD = 1.6 V to 3.6 V Output Low Voltage, VOL 0.2 V max ISINK = 200 μA Floating-State Leakage Current ±1 μA max Floating-State Output Capacitance 10 pF max Output Coding Straight (natural) binary CONVERSION RATE Conversion Time 4.70 μs max 16 SCLK cycles with SCLK at 3.4 MHz Throughput Rate 200 kSPS max See the Serial Interface section POWER REQUIREMENTS VDD 1.6/3.6 V min/max IDD Digital inputs = 0 V or VDD Normal Mode (Operational) 300 μA max VDD = 3 V, fSAMPLE = 100 kSPS 110 μA typ VDD = 3 V, fSAMPLE = 50 kSPS 20 μA typ VDD = 3 V, fSAMPLE = 10 kSPS 240 μA max VDD = 2.5 V, fSAMPLE = 100 kSPS 80 μA typ VDD = 2.5 V, fSAMPLE = 50 kSPS 16 μA typ VDD = 2.5 V, fSAMPLE = 10 kSPS 165 μA max VDD = 1.8 V, fSAMPLE = 100 kSPS 50 μA typ VDD = 1.8 V, fSAMPLE = 50 kSPS 10 μA typ VDD = 1.8 V, fSAMPLE = 10 kSPS Power-Down Mode 0.1 μA max SCLK on or off, typically 8 nA Power Dissipation See the Power Consumption section Normal Mode (Operational) 0.9 mW max VDD = 3 V, fSAMPLE = 100 kSPS 0.6 mW max VDD = 2.5 V, fSAMPLE = 100 kSPS 0.3 mW max VDD = 1.8 V, fSAMPLE = 100 kSPS Power-Down Mode 0.3 μW max VDD = 3 V Rev. C | Page 4 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7466 AD7467 AD7468 TIMING SPECIFICATIONS TIMING EXAMPLES Timing Example 1 Timing Example 2 ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS DYNAMIC PERFORMANCE CURVES DC ACCURACY CURVES POWER REQUIREMENT CURVES TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS NORMAL MODE POWER CONSUMPTION Power Consumption Example 1 Power Consumption Example 2 SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7466/AD7467/AD7468 to TMS320C541 Interface AD7466/AD7467/AD7468 to ADSP-218x Interface AD7466/AD7467/AD7468 to DSP563xx Interface APPLICATION HINTS GROUNDING AND LAYOUT EVALUATING THE PERFORMANCE OF THE AD7466 AND AD7467 OUTLINE DIMENSIONS ORDERING GUIDE