Datasheet AD6645 (Analog Devices) - 6
| 制造商 | Analog Devices |
| 描述 | 14-Bit, 80 MSPS/105 MSPS A/D Converter |
| 页数 / 页 | 25 / 6 — Data Sheet. AD6645. AD6645ASQ-80/. AD6645ASQ-105/. Test. AD6645ASV-80. … |
| 修订版 | E |
| 文件格式/大小 | PDF / 1.0 Mb |
| 文件语言 | 英语 |
Data Sheet. AD6645. AD6645ASQ-80/. AD6645ASQ-105/. Test. AD6645ASV-80. AD6645ASV-105. Parameter. Temp. Level Min. Typ. Max. Min. Unit. Conditions
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Data Sheet AD6645 AD6645ASQ-80/ AD6645ASQ-105/ Test AD6645ASV-80 AD6645ASV-105 Parameter Temp Level Min Typ Max Min Typ Max Unit Conditions
WORST HARMONIC (FOURTH OR HIGHER) Analog Input @ −1 dBFS 25°C V 96.0 96.0 dBc At 15.5 MHz Full II 85.0 95.0 dBc At 30.5 MHz 25°C I 86.0 95.0 dBc At 37.7 MHz Full V 90.0 90.0 dBc At 70.0 MHz 25°C V 90.0 90.0 dBc At 150.0 MHz 25°C V 88.0 88.0 dBc At 200.0 MHz TWO-TONE SFDR 25°C V 100 98.0 dBFS At 30.5 MHz1, 2 25°C V 100 98.0 dBFS At 55.0 MHz1, 3 25°C V 98.0 dBFS At 70.0 MHz1, 4 TWO-TONE IMD REJECTION2, 3 F1, F2 @ −7 dBFS 25°C V 90 90 dBc ANALOG INPUT BANDWIDTH 25°C V 270 270 MHz 1 Analog input signal power swept from −10 dBFS to −100 dBFS. 2 F1 = 30.5 MHz, F2 = 31.5 MHz. 3 F1 = 55.25 MHz, F2 = 56.25 MHz. 4 F1 = 69.1 MHz, F2 = 71.1 MHz.
SWITCHING SPECIFICATIONS
AVCC = 5 V, DVCC = 3.3 V; ENCODE, ENCODE, TMIN and TMAX at rated speed grade, unless otherwise noted.
Table 4. AD6645ASQ-80/ AD6645ASQ-105/ Test AD6645ASV-80 AD6645ASV-105 Parameter Symbol Temp Level Min Typ Max Min Typ Max Unit
ENCODE INPUT PARAMETERS1 Maximum Conversion Rate Full II 80 105 MSPS Minimum Conversion Rate Full IV 30 30 MSPS ENCODE Pulse Width High, t 2 ENCH Full IV 5.625 4.286 ns Full V 6.25 4.75 ns ENCODE Pulse Width Low, t 2 ENCL Full IV 5.625 4.286 ns Full V 6.25 4.75 ns ENCODE Period1 tENC Full V 12.5 9.5 ns ENCODE/DATA-READY ENCODE Rising to Data-Ready Falling tDR Full V 1.0 2.0 3.1 1.0 2.0 3.1 ns ENCODE Rising to Data-Ready Rising tE_DR Full V tENCH + tDR tENCH + tDR ns 50% Duty Cycle Full V 7.3 8.3 9.4 5.7 6.75 7.9 ns ENCODE/DATA (D13:0), OVR ENCODE to DATA Falling Low tE_FL Full V 2.4 4.7 7.0 2.4 4.7 7.0 ns ENCODE to DATA Rising Low3 tE_RL Full V 1.4 3.0 4.7 1.4 3.0 4.7 ns ENCODE to DATA Delay3 (Hold Time) tH_E Full V 1.4 3.0 4.7 1.4 3.0 4.7 ns ENCODE to DATA Delay (Setup Time) tS_E Full V tENC − tENC − ns tE_FL(max) tE_FL(max) tENC − tENC − ns tE_FL(typ) tE_FL(typ) tENC − tENC − ns tE_FL(min) tE_FL(min) 50% Duty Cycle Full V 5.3 7.6 10.0 2.3 4.8 7.0 ns Rev. E | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS TERMINOLOGY THEORY OF OPERATION APPLYING THE AD6645 Encoding the AD6645 Driving the Analog Inputs Power Supplies Digital Outputs Grounding LAYOUT INFORMATION JITTER CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD6645 AD6645ASQ-80/ AD6645ASQ-105/ Test AD6645ASV-80 AD6645ASV-105 Parameter Temp Level Min Typ Max Min Typ Max Unit Conditions
WORST HARMONIC (FOURTH OR HIGHER) Analog Input @ −1 dBFS 25°C V 96.0 96.0 dBc At 15.5 MHz Full II 85.0 95.0 dBc At 30.5 MHz 25°C I 86.0 95.0 dBc At 37.7 MHz Full V 90.0 90.0 dBc At 70.0 MHz 25°C V 90.0 90.0 dBc At 150.0 MHz 25°C V 88.0 88.0 dBc At 200.0 MHz TWO-TONE SFDR 25°C V 100 98.0 dBFS At 30.5 MHz1, 2 25°C V 100 98.0 dBFS At 55.0 MHz1, 3 25°C V 98.0 dBFS At 70.0 MHz1, 4 TWO-TONE IMD REJECTION2, 3 F1, F2 @ −7 dBFS 25°C V 90 90 dBc ANALOG INPUT BANDWIDTH 25°C V 270 270 MHz 1 Analog input signal power swept from −10 dBFS to −100 dBFS. 2 F1 = 30.5 MHz, F2 = 31.5 MHz. 3 F1 = 55.25 MHz, F2 = 56.25 MHz. 4 F1 = 69.1 MHz, F2 = 71.1 MHz.
SWITCHING SPECIFICATIONS
AVCC = 5 V, DVCC = 3.3 V; ENCODE, ENCODE, TMIN and TMAX at rated speed grade, unless otherwise noted.
Table 4. AD6645ASQ-80/ AD6645ASQ-105/ Test AD6645ASV-80 AD6645ASV-105 Parameter Symbol Temp Level Min Typ Max Min Typ Max Unit
ENCODE INPUT PARAMETERS1 Maximum Conversion Rate Full II 80 105 MSPS Minimum Conversion Rate Full IV 30 30 MSPS ENCODE Pulse Width High, t 2 ENCH Full IV 5.625 4.286 ns Full V 6.25 4.75 ns ENCODE Pulse Width Low, t 2 ENCL Full IV 5.625 4.286 ns Full V 6.25 4.75 ns ENCODE Period1 tENC Full V 12.5 9.5 ns ENCODE/DATA-READY ENCODE Rising to Data-Ready Falling tDR Full V 1.0 2.0 3.1 1.0 2.0 3.1 ns ENCODE Rising to Data-Ready Rising tE_DR Full V tENCH + tDR tENCH + tDR ns 50% Duty Cycle Full V 7.3 8.3 9.4 5.7 6.75 7.9 ns ENCODE/DATA (D13:0), OVR ENCODE to DATA Falling Low tE_FL Full V 2.4 4.7 7.0 2.4 4.7 7.0 ns ENCODE to DATA Rising Low3 tE_RL Full V 1.4 3.0 4.7 1.4 3.0 4.7 ns ENCODE to DATA Delay3 (Hold Time) tH_E Full V 1.4 3.0 4.7 1.4 3.0 4.7 ns ENCODE to DATA Delay (Setup Time) tS_E Full V tENC − tENC − ns tE_FL(max) tE_FL(max) tENC − tENC − ns tE_FL(typ) tE_FL(typ) tENC − tENC − ns tE_FL(min) tE_FL(min) 50% Duty Cycle Full V 5.3 7.6 10.0 2.3 4.8 7.0 ns Rev. E | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS TERMINOLOGY THEORY OF OPERATION APPLYING THE AD6645 Encoding the AD6645 Driving the Analog Inputs Power Supplies Digital Outputs Grounding LAYOUT INFORMATION JITTER CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE